Archipelago - An Open Source FPGA with Toolflow Support
暂无分享,去创建一个
[1] Robert W. Brodersen,et al. Design and applications of a reconfigurable computing system for high performance digital signal processing , 2005 .
[2] Jonathan Rose,et al. The effect of LUT and cluster size on deep-submicron FPGA performance and density , 2004 .
[3] Kenneth B. Kent,et al. The VTR project: architecture and CAD for FPGAs from verilog to routing , 2012, FPGA '12.
[4] Sylvain Guilley,et al. An 8×8 run-time reconfigurable FPGA embedded in a SoC , 2008, 2008 45th ACM/IEEE Design Automation Conference.
[5] Jonathan Rose,et al. Design, layout and verification of an FPGA using automated tools , 2005, FPGA '05.
[6] Vaughn Betz,et al. How Much Logic Should Go in an FPGA Logic Block? , 1998, IEEE Des. Test Comput..
[7] Ralph Wittig,et al. MPI as a Programming Model for High-Performance Reconfigurable Computers , 2010, TRETS.
[8] Wayne Luk,et al. An energy and power consumption analysis of FPGA routing architectures , 2009, 2009 International Conference on Field-Programmable Technology.
[9] Robert K. Brayton,et al. ABC: An Academic Industrial-Strength Verification Tool , 2010, CAV.
[10] Xun Chen,et al. Regular fabric for regular FPGA (abstract only) , 2011, FPGA '11.
[11] John Wawrzynek,et al. Chisel: Constructing hardware in a Scala embedded language , 2012, DAC Design Automation Conference 2012.
[12] Kenneth B. Kent,et al. Odin II - An Open-Source Verilog HDL Synthesis Tool for CAD Research , 2010, 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines.
[13] Jonathan Rose,et al. Automatic transistor and physical design of FPGA tiles from an architectural specification , 2003, FPGA '03.
[14] Holger Blume,et al. Design flow for embedded FPGAs based on a flexible architecture template , 2008, 2008 Design, Automation and Test in Europe.
[15] John Wawrzynek. Should the academic community launch an open-source FPGA device and tools effort?: evening panel , 2011, FPGA '11.
[16] Vaughn Betz,et al. VPR: A new packing, placement and routing tool for FPGA research , 1997, FPL.
[17] Kenneth B. Kent,et al. VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling , 2011, TRETS.
[18] Anthony J. Yu,et al. Directional and single-driver wires in FPGA interconnect , 2004, Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921).