Crosstalk immune interconnect driver design

The effect of crosstalk noise becomes increasingly significant as geometries continue to shrink into the deep sub-micrometer regime and clock-frequency increases into the multi GHz domain. Dynamic delay caused by coupling capacitance between adjacent interconnections is a critical problem, as it cannot accurately be estimated in static timing analysis. This work presents a new driver circuit scheme called the crosstalk immune interconnect driver (XTIID), for capacitively coupled interconnects, which eliminates pattern-dependent coupling noise. Also, such an interconnect drive technology has the potential to facilitate the dynamic timing problem in deep submicrometer VLSI design.

[1]  Mahmut T. Kandemir,et al.  A crosstalk aware interconnect with variable cycle transmission , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[2]  Wayne P. Burleson,et al.  Boosters for driving long onchip interconnects - design issues, interconnect synthesis, and comparison with repeaters , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  David Blaauw,et al.  Active shields: a new approach to shielding global wires , 2002, GLSVLSI '02.

[4]  Hannu Tenhunen,et al.  Maximizing throughput over parallel wire structures in the deep submicrometer regime , 2003, IEEE Trans. Very Large Scale Integr. Syst..

[5]  Andrew B. Kahng,et al.  On switch factor based analysis of coupled RC interconnects , 2000, Proceedings 37th Design Automation Conference.

[6]  Masakazu Yamashina,et al.  Capacitance coupling immune, transient sensitive accelerator for resistive interconnect signals of subquarter micron ULSI , 1996 .

[7]  Dennis Sylvester,et al.  Analytical modeling and characterization of deep-submicrometer interconnect , 2001 .

[8]  Dennis Sylvester,et al.  Transition aware global signaling (TAGS) , 2002, Proceedings International Symposium on Quality Electronic Design.

[9]  Dhanistha Panyasak,et al.  Circuits , 1995, Annals of the New York Academy of Sciences.

[10]  Soon-Kyun Shin,et al.  A slew rate controlled output driver using PLL as compensation circuit , 2002, Proceedings of the 28th European Solid-State Circuits Conference.