Precise behavioural modelling of high-resolution switched-capacitor delta-sigma modulators

A precise behavioral modelling of switched-capacitor /spl Delta//spl Sigma/ modulators is presented. Considering noise (switch and op-amp thermal noise), clock jitter, nonidealities of integrators and op-amps including finite DC gain (DCG) and unity gain bandwidth (UGBW), slew-limiting, DCG nonlinearities and the input parasitic capacitance, exhaustive behavioral simulations that are close models of the transistor level ones can be performed. Evaluation and validation of the models was done via behavioral simulations for a second-order modulator using SIMULINK. The effects of the nonidealities and nonlinearities are clearly seen when compared to the ideal modulator.