A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery

We present an efficient method to budget on-chip decoupling capacitors (decaps) to optimize power delivery networks in an area efficient way. Our algorithm is based on an efficient gradient-based nonlinear programming method for searching the solution. Our contributions are an efficient gradient computation method (time-domain merged adjoint network) and a novel equivalent circuit modelling technique to speed up the optimization process. Experimental results demonstrate that the algorithm is capable of efficiently optimizing very large scale P/G networks.

[1]  Malgorzata Marek-Sadowska,et al.  On-chip power-supply network optimization using multigrid-based technique , 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Charlie Chung-Ping Chen,et al.  Efficient large-scale power grid analysis based on preconditioned Krylov-subspace iterative methods , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[3]  Robert G. Meyer,et al.  Computationally efficient electronic-circuit noise calculations , 1971 .

[4]  Leon O. Chua,et al.  Computer-Aided Analysis Of Electronic Circuits , 1975 .

[5]  D. Blaauw,et al.  Design and analysis of power distribution networks in PowerPC/sup TM/ microprocessors , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[6]  Sheldon X.-D. Tan,et al.  A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery , 2004 .

[7]  Sani R. Nassif,et al.  An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts , 2002, ISPD '02.

[8]  Mark Horowitz,et al.  Techniques for calculating currents and voltages in VLSI power supply networks , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Lawrence T. Pileggi,et al.  PRIMA: passive reduced-order interconnect macromodeling algorithm , 1998, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[10]  Malgorzata Marek-Sadowska,et al.  On-chip power-supply network optimization using multigrid-based technique , 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Chung-Kuan Cheng,et al.  Area minimization of power distribution network using efficient nonlinear programming techniques , 2001, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[12]  Kaushik Roy,et al.  Decoupling capacitance allocation for power supply noise suppression , 2001, ISPD '01.

[13]  Raminderpal Singh Simulation and Optimization of the Power Distribution Network in VLSI Circuits , 2002 .

[14]  Sheldon X.-D. Tan,et al.  Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  Sheldon X.-D. Tan,et al.  Fast power/ground network optimization based on equivalent circuit modeling , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[16]  Sachin S. Sapatnekar,et al.  Fast analysis and optimization of power/ground networks , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[17]  Sani R. Nassif,et al.  Multigrid-like technique for power grid analysis , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[18]  Jun Gu,et al.  Area minimization of power distribution network using efficient nonlinear programming techniques , 2001, ICCAD 2001.

[19]  Rajendran Panda,et al.  Hierarchical analysis of power distribution networks , 2000, DAC.

[20]  Charlie Chung-Ping Chen,et al.  Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).