Ultrathin Silicon-an-Insulator (SOI) Wafer for Compliant Substrate

Compliant substrate is one of the most promising approaches for heteroepitaxy of the semiconductor devices. SOI wafer is the only commercial structure used for the compliant substrate researches. Yet, previous studies reported ineffectiveness of SOI as a compliant substrate for thickness regions above 10 nm. This was due to the interference of BOX layer. This research explored compliance of SOI thickness below 10 nm. 300 nm GaAs film was deposited by MBE on 4nm SOI and bulk Si wafer. Comparison showed reduced threading dislocation density of GaAs on ultrathin SOI and subsequently larger columnar grains.