Activation Energies for Oxide- and Interface-Trap Charge Generation Due to Negative-Bias Temperature Stress of Si-Capped SiGe-pMOSFETs

We investigate negative-bias temperature instabilities in SiGe pMOSFETs with SiO2/HfO2 gate dielectrics. The measured activation energies for interface-trap charge buildup during negative-bias temperature stress are lower for SiGe channel pMOSFETs with SiO2/HfO2 gate dielectrics and Si capping layers than for conventional Si channel pMOSFETs with SiO2 gate dielectrics. Electron energy loss spectroscopy and scanning transmission electron microscopy images demonstrate that Ge atoms can diffuse from the SiGe layer into the Si capping layer, which is adjacent to the SiO2/HfO2 gate dielectric. Density functional calculations show that these Ge atoms reduce the strength of nearby Si-H bonds and that Ge-H bond energies are still lower, thereby reducing the activation energy for interface-trap generation for the SiGe devices. Activation energies for oxide-trap charge buildup during negative-bias temperature stress are similarly small for SiGe pMOSFETs with SiO2/HfO2 gate dielectrics and Si pMOSFETs with SiO2 gate dielectrics, suggesting that, in both cases, the oxide-trap charge buildup likely is rate-limited by hole tunneling into the near-interfacial SiO2.

[1]  H. C. Kang,et al.  Hydrogen desorption kinetics from the Si(1-x)Gex(100)-(2x1) surface. , 2004, The Journal of chemical physics.

[2]  K. Onishi,et al.  Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric , 2000, IEEE Electron Device Letters.

[3]  G. Ghibaudo,et al.  Review on high-k dielectrics reliability issues , 2005, IEEE Transactions on Device and Materials Reliability.

[4]  B. Kaczer,et al.  SiGe Channel Technology: Superior Reliability Toward Ultrathin EOT Devices—Part I: NBTI , 2013, IEEE Transactions on Electron Devices.

[5]  Kresse,et al.  Efficient iterative schemes for ab initio total-energy calculations using a plane-wave basis set. , 1996, Physical review. B, Condensed matter.

[6]  Jack C. Lee,et al.  Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing , 2000 .

[7]  En Xia Zhang,et al.  Fin-Width Dependence of Ionizing Radiation-Induced Subthreshold-Swing Degradation in 100-nm-Gate-Length FinFETs , 2009, IEEE Transactions on Nuclear Science.

[8]  Daniel M. Fleetwood,et al.  1/f noise, hydrogen transport, and latent interface-trap buildup in irradiated MOS devices , 1997 .

[9]  Structure and energetics of the Si- SiO2 interface , 1999, Physical review letters.

[10]  L. Pantisano,et al.  Origin of the threshold voltage instability in SiO2/HfO2 dual layer gate dielectrics , 2003, IEEE Electron Device Letters.

[11]  Ronald D. Schrimpf,et al.  Negative bias-temperature instabilities in metal–oxide–silicon devices with SiO2 and SiOxNy/HfO2 gate dielectrics , 2004 .

[12]  peixiong zhao,et al.  Atomic-scale origins of bias-temperature instabilities in SiC–SiO2 structures , 2011 .

[13]  T. Grasser,et al.  Dispersive Transport and Negative Bias Temperature Instability: Boundary Conditions, Initial Conditions, and Transport Models , 2008, IEEE Transactions on Device and Materials Reliability.

[14]  D. Fleetwood,et al.  New insights into radiation-induced oxide-trap charge through thermally-stimulated-current measurement and analysis (MOS capacitors) , 1992 .

[15]  R. Degraeve,et al.  6Å EOT Si0.45Ge0.55 pMOSFET with optimized reliability (VDD=1V): Meeting the NBTI lifetime target at ultra-thin EOT , 2010, 2010 International Electron Devices Meeting.

[16]  Liesbeth Witters,et al.  SiGe SEG Growth for Buried Channels p-MOS Devices , 2009 .

[17]  M. Nelhiebel,et al.  A two-stage model for negative bias temperature instability , 2009, 2009 IEEE International Reliability Physics Symposium.

[18]  John Robertson,et al.  Defect energy levels in HfO2 high-dielectric-constant gate oxide , 2005 .

[19]  S. Krishnan,et al.  Observations of NBTI-induced atomic-scale defects , 2005, IEEE Transactions on Device and Materials Reliability.

[20]  Shigeo Ogawa,et al.  Interface‐trap generation at ultrathin SiO2 (4–6 nm)‐Si interfaces during negative‐bias temperature aging , 1995 .

[21]  peixiong zhao,et al.  Physical mechanisms of negative-bias temperature instability , 2005 .

[22]  S. Pantelides,et al.  Migration, incorporation, and passivation reactions of molecular hydrogen at the Si ‐ Si O 2 interface , 2004 .

[23]  P. Eyben,et al.  1mA/um-ION strained SiGe45%-IFQW pFETs with raised and embedded S/D , 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

[24]  K. Jeppson,et al.  Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices , 1977 .

[25]  Jerome Mitard,et al.  The Influence of the Epitaxial Growth Process Parameters on Layer Characteristics and Device Performance in Si-passivated Ge pMOSFETs , 2009 .

[26]  T. Grasser,et al.  Recovery-free electron spin resonance observations of NBTI degradation , 2010, 2010 IEEE International Reliability Physics Symposium.

[27]  D. Fleetwood Fast and slow border traps in MOS devices , 1995 .

[28]  Burke,et al.  Generalized Gradient Approximation Made Simple. , 1996, Physical review letters.

[29]  G. Kresse,et al.  From ultrasoft pseudopotentials to the projector augmented-wave method , 1999 .

[30]  Ogawa,et al.  Generalized diffusion-reaction model for the low-field charge-buildup instability at the Si-SiO2 interface. , 1995, Physical review. B, Condensed matter.

[31]  L. Tsetseris,et al.  Hydrogen-Related Instabilities in MOS Devices Under Bias Temperature Stress , 2007, IEEE Transactions on Device and Materials Reliability.