Mutation Scheduling: A Unified Approach to Compiling for Fine-Grain Parallelism

Trade-offs between code selection, register allocation, and instruction scheduling are inherently interdependent, especially when compiling for fine-grain parallel architectures. However, the conventional approach to compiling for such machines arbitrarily separates these phases so that decisions made during any one phase place unnecessary constraints on the remaining phases. Mutation Scheduling attempts to solve this problem by combining code selection, register allocation, and instruction scheduling into a unified framework in which trade-offs between the functional, register, and memory bandwidth resources of the target architecture are made “on the fly” in response to changing resource constraints and availability.

[1]  Alexandru Nicolau,et al.  Resource-Directed Loop Pipelining , 1996, LCPC.

[2]  Roni Potasman.  Percolation-based compiling for evaluation of parallelism and hardware design trade-offs , 1991 .

[3]  Rajiv Gupta,et al.  Region Scheduling: An Approach for Detecting and Redistributing Parallelism , 1990, IEEE Trans. Software Eng..

[4]  Milind Girkar,et al.  Automatic Extraction of Functional Parallelism from Ordinary Programs , 1992, IEEE Trans. Parallel Distributed Syst..

[5]  Alexandru Nicolau,et al.  Register Allocation, Renaming and Their Impact on Fine-Grain Parallelism , 1991, LCPC.

[6]  Alexandru Nicolau,et al.  Uniform Parallelism Exploitation in Ordinary Programs , 1985, ICPP.

[7]  Kemal Ebcioglu,et al.  An efficient resource-constrained global scheduling technique for superscalar and VLIW processors , 1992, MICRO 1992.

[8]  B. Ramakrishna Rau,et al.  Efficient code generation for horizontal architectures: Compiler techniques and architectural support , 1982, ISCA '82.

[9]  Rajiv Gupta,et al.  Resource Spackling: A Framework for Integrating Register Allocation in Local and Global Schedulers , 1994, IFIP PACT.

[10]  Yoichi Muraoka,et al.  On the Number of Operations Simultaneously Executable in Fortran-Like Programs and Their Resulting Speedup , 1972, IEEE Transactions on Computers.

[11]  Alfred V. Aho,et al.  Compilers: Principles, Techniques, and Tools , 1986, Addison-Wesley series in computer science / World student series edition.

[12]  B. Ramakrishna Rau,et al.  Efficient code generation for horizontal architectures: Compiler techniques and architectural support , 1982, ISCA '82.

[13]  Susan J. Eggers,et al.  Integrating register allocation and instruction scheduling for RISCs , 1991, ASPLOS IV.

[14]  Mark N. Wegman,et al.  Efficiently computing static single assignment form and the control dependence graph , 1991, TOPL.

[15]  Alexandru Nicolau,et al.  Trailblazing: A Hierarchical Approach to Percolation Scheduling , 1993, 1993 International Conference on Parallel Processing - ICPP'93.

[16]  Alexandru Nicolau,et al.  An Efficient Global Resource Constrained Technique for Exploiting Instruction Level Parallelism , 1992, ICPP.

[17]  Alexandru Nicolau,et al.  Incremental tree height reduction for high level synthesis , 1991, 28th ACM/IEEE Design Automation Conference.

[18]  Henry Massalin.  Superoptimizer: a look at the smallest program , 1987, ASPLOS 1987.