论文信息 - Area efficient CMOS charge pump circuits

Area efficient CMOS charge pump circuits

This paper describes the operation of three types of charge pump circuits. Power efficiency theory of charge pumps is discussed. A method of estimating the output ripple of a charge pump from the size of the capacitors used is described. A new charge pump circuit that uses two cascoded buffer transistors to improve the area efficiency is proposed.

Gabor C. Temes | Un-Ku Moon | R. Perigny

[1] Michel Declercq,et al. A high-efficiency CMOS voltage doubler , 1998, IEEE J. Solid State Circuits.

[2] E.C. Dijkmans,et al. A -90 dB THD rail-to-rail input opamp using a new local charge pump in CMOS , 1997, Proceedings of the 23rd European Solid-State Circuits Conference.

[3] Paul R. Gray,et al. A 10 b, 20 Msample/s, 35 mW pipeline A/D converter , 1995, IEEE J. Solid State Circuits.

[4] John F. Dickson,et al. On-Chip High-Voltage Generation in Integrated Circuits Using an Improved Multiplier Technique , 1976 .

[5] Eiji Takeda,et al. An experimental 1.5-V 64-Mb DRAM , 1991 .

[6] Guido Groeseneken,et al. Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits , 1989 .