Automatic synthesis of asynchronous circuits

The synthesis of asynchronous circuits in self-timed systems from the behavior descriptions in STG had been studied in this paper. The novelty of our proposed method is that the whole synthesis is carried out on STG and thereby maintains the problem size proportional to the signal numbers. In previous works, the state diagram is involved in the synthesis, which has a worst-case size exponential t o the signal number. In our experiment, the low-complexity method can save 14% literals and memory elements from previous works.

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