Dynamic random access memory

The invention relates to a dynamic random access memory (DRAM) comprising an array of cells each comprising a capacitive memory point and a control transistor. The matrix consists of the repetition of a unit pattern extending in three rows (R0, R1, R2; Rm-1, Rm, Rm + 2) and three columns (C0, C1, C2, Cn-1, Cn , Cn + 1) and comprising six cells arranged such that each of the three rows and each of the three columns of unit cell comprises two cells.