Architecture of Computing Systems – ARCS 2014
暂无分享,去创建一个
[1] A. Bayen,et al. A Distributed Highway Velocity Model for Traffic State Reconstruction , 2009 .
[2] Karl-Filip Faxén,et al. Wool-A work stealing library , 2008, CARN.
[3] Jian Li,et al. Power-performance considerations of parallel computing on chip multiprocessors , 2005, TACO.
[4] Kingshuk Karuri,et al. A methodology and tool suite for C compiler generation from ADL processor models , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[5] M J Lighthill,et al. ON KINEMATIC WAVES.. , 1955 .
[6] Pascal Sainrat,et al. OTAWA: An Open Toolbox for Adaptive WCET Analysis , 2010, SEUS.
[7] Jakob Engblom,et al. The worst-case execution-time problem—overview of methods and survey of tools , 2008, TECS.
[8] Markus Freericks,et al. Describing instruction set processors using nML , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.
[9] Francesco Zappa Nardelli,et al. The semantics of power and ARM multiprocessor machine code , 2009, DAMP '09.
[10] Nikil D. Dutt,et al. Modeling and validation of pipeline specifications , 2004, TECS.
[11] Jean-Luc Béchennec,et al. Extending Harmless architecture description language for embedded real-time systems validation , 2011, 2011 6th IEEE International Symposium on Industrial and Embedded Systems.
[12] Hajer Herbegue,et al. Hardware architecture specification and constraint-based WCET computation , 2013, 2013 8th IEEE International Symposium on Industrial Embedded Systems (SIES).
[13] Mats Carlsson,et al. Global Constraint Catalogue: Past, Present and Future , 2007, Constraints.
[14] Kim G. Larsen,et al. METAMOC: Modular Execution Time Analysis using Model Checking , 2010, WCET.
[15] Samuel H. Fuller,et al. Computing Performance: Game Over or Next Level? , 2011, Computer.
[16] Xianfeng Li,et al. Modeling out-of-order processors for WCET analysis , 2006, Real-Time Systems.
[17] Pascal Sainrat,et al. A Context-Parameterized Model for Static Analysis of Execution Times , 2009, Trans. High Perform. Embed. Archit. Compil..
[18] Donatella Sciuto,et al. An automated framework for the simulation of mapping solutions on heterogeneous MPSoCs , 2012, 2012 International Symposium on System on Chip (SoC).
[19] Andrew A. Chien,et al. The future of microprocessors , 2011, Commun. ACM.
[20] Nitesh Saxena,et al. On the limitations of query obfuscation techniques for location privacy , 2011, UbiComp '11.
[21] Ami Marowka. TBBench: A Micro-Benchmark Suite for Intel Threading Building Blocks , 2012, J. Inf. Process. Syst..
[22] Hajer Herbegue,et al. A constraint-based WCET computation framework , 2013 .
[23] Jean-Luc Béchennec,et al. Computation of WCET using Program Slicing and Real-Time Model-Checking , 2011, ArXiv.