Double-clock bidirectional digital delay method based on single FIFO

The invention discloses a double-clock bidirectional digital delay method based on the single FIFO, belongs to the signal processing technique, and particularly relates to a digital signal delay technique. According to the double-clock bidirectional digital delay method based on the single FIFO, the clock frequency of a control signal of the adopted FIFO is twice that of input/output data of a delay line, reading and writing of the FIFO are controlled by controlling a reading enabling signal and a writing enabling signal of the FIFO, and then the length of the FIFO is controlled. The writing enabling signal of the FIFO is changed to be valid and invalid alternately in each reading and writing clock period (namely the control clock period of the FIFO), and whether the reading enabling signal of the FIFO is enabled or not is determined according to the current length of the FIFO and required delay. According to the double-clock bidirectional digital delay method based on the single FIFO, double clocks are adopted, and thus the efficiency is greatly improved when the length of the delay line changes; the defects that according to an existing single-FIFO delay line, the FIFO needs to be removed when delay time is changed, and system processing time is occupied are overcome.