Compact Modeling of SOI MOSFETs With Ultrathin Silicon and BOX Layers
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Hans Jurgen Mattausch | Mitiko Miura-Mattausch | Nobuyuki Sugii | Masataka Miyake | Hideyuki Kikuchihara | Tadashi Nakagawa | Uwe Feldmann | Yukiya Fukunaga | Fumiya Ueno
[1] Nobuyuki Sugii,et al. Silicon on thin BOX (SOTB) CMOS for ultralow standby power with forward-biasing performance booster , 2008 .
[2] M. Miura-Mattausch,et al. HiSIM-SOI: Complete surface-potential-based model valid for all SOI-structure types , 2010, 2010 IEEE International SOI Conference (SOI).
[3] Mitiko Miura-Mattausch,et al. Modeling of Floating-Body Effect in Silicon-on-Insulator Metal-Oxide-Silicon Field-Effect Transistor with Complete Surface-Potential-Based Description , 2008 .
[4] Mitiko Miura-Mattausch,et al. Physically-based threshold voltage determination for MOSFET's of all gate lengths , 1999 .
[5] T. Iwamatsu,et al. Smallest Vth variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate , 2008, 2008 Symposium on VLSI Technology.
[6] U. Feldmann,et al. Compact modeling of SOI MOSFETs with ultra thin silicon and BOX layers for ultra low power applications , 2013, 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).
[7] T. Ohmi,et al. New aspects and mechanism of kink effect in static back-gate transconductance characteristics in fully-depleted SOI MOSFETs on high-dose SIMOX wafers , 2000 .
[8] Hans Jurgen Mattausch,et al. Simple nondestructive extraction of the vertical channel-impurity profile of small-size metal–oxide–semiconductor field-effect transistors , 2002 .
[9] Junjun Li,et al. Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[10] Hyung Kyu Lim,et al. A charge-based large-signal model for thin-film SOI MOSFET's , 1985, IEEE Transactions on Electron Devices.
[11] S. Maegawa,et al. Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[12] Modeling of electron tunneling in SOI-MOSFET and its influence on device characteristics , 2009, 2009 IEEE International SOI Conference.
[13] J. Brews. A charge-sheet model of the MOSFET , 1978 .
[14] Mitiko Miura-Mattausch,et al. Complete Surface-Potential-Based Fully-Depleted Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect-Transistor Model for Circuit Simulation , 2004 .
[15] M. Miura-Mattausch,et al. Completely Surface-Potential-Based Compact Model of the Fully Depleted SOI-MOSFET Including Short-Channel Effects , 2006, IEEE Transactions on Electron Devices.
[16] Ching-Te Chuang,et al. Measurement of history effect in PD/SOI single-ended CPL circuit , 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).
[17] R. Tsuchiya,et al. Extension of Universal Mobility Curve to Multi-Gate MOSFETs , 2007, 2007 IEEE International Electron Devices Meeting.
[18] K. Hara,et al. Radiation resistance of SOI pixel devices fabricated with OKI 0.15μm FD-SOI technology , 2008, 2008 IEEE Nuclear Science Symposium Conference Record.
[19] S. Takagi,et al. On the universality of inversion layer mobility in Si MOSFET's: Part I-effects of substrate impurity concentration , 1994 .
[20] Jerry G. Fossum,et al. Dynamic floating-body instabilities in partially depleted SOI CMOS circuits , 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.
[21] J. T. Clemens,et al. Characterization of the electron mobility in the inverted <100> Si surface , 1979, 1979 International Electron Devices Meeting.
[22] S. Takagi,et al. On the universality of inversion layer mobility in Si MOSFET's: Part II-effects of surface orientation , 1994 .
[23] A. Toriumi,et al. Re-investigation of MOS inversion layer mobility from non-universality and possible new scattering mechanism aspects , 2003, IEEE International Electron Devices Meeting 2003.
[24] Nobuyuki Sugii. Road to Vmin=0.4V LSIs with least-variability FDSOI and back-bias control , 2011, IEEE 2011 International SOI Conference.
[25] Dominique Savignac,et al. Unified complete MOSFET model for analysis of digital and analog circuits , 1994, ICCAD '94.
[26] Hans Jurgen Mattausch,et al. Physical modeling of the reverse-short-channel effect for circuit simulation , 2001 .
[27] S. Amakawa,et al. Universal Relationship between Substrate Current and History Effect in Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors , 2011 .
[28] Giorgio Baccarani,et al. Analytical i.g.f.e.t. model including drift and diffusion currents , 1978 .
[29] J.G. Fossum,et al. A Charge-Based Large-Signal Model for Thin-Film SOI MOSFET's , 1985, IEEE Journal of Solid-State Circuits.
[30] Yuan Taur,et al. Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs , 2001 .
[31] F. Van de Wiele,et al. A long-channel MOSFET model , 1979 .
[32] X. Garros,et al. Work-function engineering in gate first technology for multi-VT dual-gate FDSOI CMOS on UTBOX , 2010, 2010 International Electron Devices Meeting.
[33] Thomas Skotnicki,et al. Competitive SOC with UTBB SOI , 2011, IEEE 2011 International SOI Conference.
[34] K. Ng,et al. The Physics of Semiconductor Devices , 2019, Springer Proceedings in Physics.