Topology and Analysis of a New Resonant Gate Driver

This paper proposes a novel resonant gate driver for a high frequency synchronous buck converter. The proposed resonant gate driver can reduce switching losses significantly in addition to gate drive losses compared to a conventional gate driver. Additionally, the proposed driver has better noise immunity to dv/dt effect and is less sensitive to parasitic inductance. Loss analysis and optimization design of the proposed driver are presented in details. A 1MHz synchronous buck converter with the proposed resonant gate driver was built to verify the functionality.