A compact, high linearity 40GS/s track-and-hold amplifier in 90nm SiGe technology

The design of low distortion, high speed transceivers requires high performance Track and Hold Amplifier (THA) front ends to Analog to Digital Converters. This paper reports the design and characterization of a highly linear THA fabricated in 90nm SiGe Heterojunction Bipolar Transistor technology with Effective Number of Bits>4.9. Improved linearity is achieved through feed-through cancelation techniques, peak cutoff frequency biasing and a differential layout. The circuit is tested over a wide input frequency range of 1-19GHz with a fixed clock frequency of 40GS/s. It exhibits Spurious Free Dynamic Range as high as 78dB, Total Harmonic Distortion less than -31dB and peak Input-referred 3rd order Intercept Point of 11.1dBm. The circuit has an input-referred 1dB compression point of 6dBm and consumes 560mW of power while occupying 0.03mm2 of active die area. The SFDR3 and THD3 performance is better than similar circuits published in Silicon, and comparable to InP circuits, which consume more DC power. These results are promising for future designs of fully integrated ultra high speed transceivers in Silicon technologies.

[1]  Wei-Min Lance Kuo,et al.  A 40 GS/s SiGe track-and-hold amplifier , 2008, 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

[2]  Z. Griffith,et al.  A High IIP3, 50 GSamples/s Track and Hold Amplifier in 0.25 µm InP HBT Technology , 2012, 2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).

[3]  Sorin P. Voinigescu,et al.  Design methodology for a 40-GSamples/s track and hold amplifier in 0.18-μm SiGe BiCMOS technology , 2006 .

[4]  Franco Maloberti,et al.  Design issues on high-speed high-resolution track-and-holds in BiCMOS technology , 2000 .

[5]  Aydin Babakhani,et al.  A 40GS/s Track-and-Hold amplifier with 62dB SFDR3 in 45nm CMOS SOI , 2014, 2014 IEEE MTT-S International Microwave Symposium (IMS2014).

[6]  Sorin P. Voinigescu,et al.  A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology , 2006, IEEE Custom Integrated Circuits Conference 2006.

[7]  S.P. Voinigescu,et al.  Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-$muhbox m$SiGe BiCMOS Technology , 2006, IEEE Journal of Solid-State Circuits.

[8]  Jaesik Lee,et al.  A 50-GS/s 5-b ADC in 0.18-µm SiGe BiCMOS , 2010, 2010 IEEE MTT-S International Microwave Symposium.

[9]  P. Vorenkamp,et al.  Fully bipolar, 120-Msample/s 10-b track-and-hold circuit , 1992 .