Decimation Filter Design of Electrical Energy Measurement IC Sigma-Delta ADC

Electrical energy measurement requires high accuracy,Sigma-Delta ADC meets it.It presents a decimator filter that can be used in electrical energy measurement IC for ∑-△ADC,using this decimation will converted the Sigma-Delta modulator signal of the serial bit stream into a number of parallel.The filter consists of a CIC filter,a HBF and a FIR compensation filter.Optimize the order and coefficient to realize decimation ratio of 128.In implemention of HBF with CSD code,use CSMC 0.18um process to synthesis and then found the area is less than 8%,and power dissipation is less than 15%,compared with convention method after optimization.Experimental results show the decimation filter has improved in the area and power,and performance in full compliance with the requirements of the energy metering chip.