A dynamic zero frequency compensation for 3 A NMOS ultra-low dropout regulator

A dynamic zero frequency-compensation technique for 3 A NMOS low dropout-regulator (LDO) is presented. The dynamic zero is adapted to load current to get an adequate phase margin with a load current variation from 0 to 3 A. The proposed NMOS LDO has been implemented in a standard 0.35 μm CMOS process, and the die size is as small as 650 × 890 μm2. In the experimented transient response, the load regulation of 3.3 mV/A is observed. In addition, the power-supply rejection ratio at 1 MHz can be up to −30 dB.

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