Analog-VHDL: As an Application, a Real Example

Abstract Simulation is most widely used for the verification of VLSI circuits design. This paper highlights the importance of mixed-mode digital-analog simulation and describes its basic principles. The second topics of this paper is hardware description languages that cover both the digital and the electrical levels. The last part presents the current standardization effort for Analog-VHDL. The main requirements are presented, and a complete example is given.