A 51.2 GOPS scalable video recognition processor for intelligent cruise control based on a linear array of 128 4-way VLIW processing elements

A 51.2 GOPS fully programmable and scalable video recognition processor is based on a linear connection of 128 4-way VLIW processing elements and an asynchronous data mapping mechanism. Execution is under 33 ms/frame for complex weather, robust road area/lane marking, and vehicle detection. The chip contains 32.7M transistors in 121 mm/sup 2/ area fabricated in 0.18 /spl mu/m 7M CMOS.

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