Analytical Classifications of Side Channel Attacks, Glitch Attacks and Fault Injection Techniques: Their Countermeasures
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[1] Debdeep Mukhopadhyay,et al. Differential Fault Analysis of the Advanced Encryption Standard Using a Single Fault , 2011, WISTP.
[2] Robert H. Deng,et al. Breaking Public Key Cryptosystems on Tamper Resistant Devices in the Presence of Transient Faults , 1997, Security Protocols Workshop.
[3] Yang Li,et al. Fault Sensitivity Analysis , 2010, CHES.
[4] Ingrid Verbauwhede,et al. Hardware Designer's Guide to Fault Attacks , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[5] Jia Di,et al. Delay Insensitive Ternary CMOS Logic for Secure Hardware , 2015 .
[6] Markus G. Kuhn,et al. Low Cost Attacks on Tamper Resistant Devices , 1997, Security Protocols Workshop.
[7] Jean-Max Dutertre,et al. Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism , 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).
[8] Arjen K. Lenstra. Memo on RSA signature generation in the presence of faults , 1996 .
[9] Eli Biham,et al. Differential Fault Analysis of Secret Key Cryptosystems , 1997, CRYPTO.
[10] Sergei Skorobogatov. Hardware Security Implications of Reliability, Remanence, and Recovery in Embedded Memory , 2018, J. Hardw. Syst. Secur..
[11] G. Cathebras,et al. Supply voltage glitches effects on CMOS circuits , 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..
[12] Ross J. Anderson,et al. On a new way to read data from memory , 2002, First International IEEE Security in Storage Workshop, 2002. Proceedings..
[13] Jia Di,et al. A Hardware Threat Modeling Concept for Trustable Integrated Circuits , 2007, 2007 IEEE Region 5 Technical Conference.
[14] Gernot Heiser,et al. A survey of microarchitectural timing attacks and countermeasures on contemporary hardware , 2016, Journal of Cryptographic Engineering.
[15] Jia Di,et al. Mitigating power- and timing-based side-channel attacks using dual-spacer dual-rail delay-insensitive asynchronous logic , 2013, Microelectron. J..
[16] Christophe Giraud,et al. DFA on AES , 2004, AES Conference.
[17] Hailong Liu,et al. Clock Glitch Fault Injection Attacks on an FPGA AES Implementation , 2017 .
[18] Gernot Heiser,et al. Your processor leaks information — and there's nothing you can do about it , 2016, 1612.04474.
[19] Qiang Zhou,et al. Information hiding for trusted system design , 2009, 2009 46th ACM/IEEE Design Automation Conference.
[20] Swarup Bhunia,et al. Security against hardware Trojan through a novel application of design obfuscation , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.
[21] Jean-Pierre Seifert,et al. Fault Based Cryptanalysis of the Advanced Encryption Standard (AES) , 2003, Financial Cryptography.
[22] W.K. Al-Assadi,et al. Secured Hardware Design - An Overview , 2008, 2008 IEEE Region 5 Conference.
[23] Assia Tria,et al. Power supply glitch attacks: Design and evaluation of detection circuits , 2014, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).
[24] Alessandro Barenghi,et al. Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures , 2012, Proceedings of the IEEE.
[25] Jackson R. Mayo,et al. Targeted modification of hardware trojans , 2019, J. Hardw. Syst. Secur..
[26] Yiorgos Makris,et al. Enhancing security via provably trustworthy hardware intellectual property , 2011, 2011 IEEE International Symposium on Hardware-Oriented Security and Trust.
[27] Jean-Jacques Quisquater,et al. Faults, Injection Methods, and Fault Attacks , 2007, IEEE Design & Test of Computers.
[28] Richard J. Lipton,et al. On the Importance of Checking Cryptographic Protocols for Faults (Extended Abstract) , 1997, EUROCRYPT.
[29] Mark Mohammad Tehranipoor,et al. Trustworthy Hardware: Identifying and Classifying Hardware Trojans , 2010, Computer.
[30] Miodrag Potkonjak,et al. Synthesis of trustable ICs using untrusted CAD tools , 2010, Design Automation Conference.
[31] Ross J. Anderson,et al. Optical Fault Induction Attacks , 2002, CHES.
[32] Kazuo Ohta,et al. Fault Analysis Attack against an AES Prototype Chip Using RSL , 2009, CT-RSA.
[33] M. Kuhn,et al. The Advanced Computing Systems Association Design Principles for Tamper-resistant Smartcard Processors Design Principles for Tamper-resistant Smartcard Processors , 2022 .
[34] David Naccache,et al. The Sorcerer's Apprentice Guide to Fault Attacks , 2006, Proceedings of the IEEE.
[35] Assia Tria,et al. Detecting positive voltage attacks on CMOS circuits , 2014, CS2 '14.
[36] Ariel J. Feldman,et al. Lest we remember: cold-boot attacks on encryption keys , 2008, CACM.
[37] Eltayeb Salih Abuelyaman,et al. Differential Fault Analysis , 2005, International Conference on Internet Computing.
[38] Michael Hamburg,et al. Spectre Attacks: Exploiting Speculative Execution , 2018, 2019 IEEE Symposium on Security and Privacy (SP).
[39] Stefan Mangard,et al. A Simple Power-Analysis (SPA) Attack on Implementations of the AES Key Expansion , 2002, ICISC.
[40] Mahdi Fazeli,et al. Hardware Security Evaluation Platform for MCU-Based Connected Devices: Application to Healthcare IoT , 2018, 2018 IEEE 3rd International Verification and Security Workshop (IVSW).
[41] Jeyavijayan Rajendran,et al. Towards a comprehensive and systematic classification of hardware Trojans , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.
[42] Rajat Subhra Chakraborty,et al. A Hardware Trojan Attack on FPGA-Based Cryptographic Key Generation: Impact and Detection , 2018, Journal of Hardware and Systems Security.
[43] Pankaj Rohatgi,et al. Introduction to differential power analysis , 2011, Journal of Cryptographic Engineering.