Optimization of field grading for a 1000 KV wide-band voltage divider

Abstract An HVDC reference voltage divider has been designed for high accuracy and wide-band measurements up to 1000 kV. To maintain wide-band characteristics, field distribution must be optimized in order to minimize the response time of the divider. To compensate the stray capacitance, a capacitive path that surrounds the resistive reference divider is added to function as a shield. Optimal capacitance values producing a matched distribution are obtained using 3D FEM simulations. Factors affecting the performance of the divider are assessed by simulating multiple scenarios representing different practical considerations in real-life applications.