Front-end Electronics Design based on Vernier Method for a High Resolution MicroPET
暂无分享,去创建一个
Shi Wang | Yan Xia | Yaqiang Liu | Xiaowen Kang | Zhaoxia Wu | Xishan Sun | Zhicheng Zhang | Yongjie Jin
[1] J. J. Williams,et al. High-precision TDC in an FPGA using a 192 MHz quadrature clock , 2002, 2002 IEEE Nuclear Science Symposium Conference Record.
[2] Yu Wang,et al. A programmable high-resolution ultra-fast delay generator , 2002 .
[3] Jinyuan Wu,et al. Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA) , 2003, 2003 IEEE Nuclear Science Symposium. Conference Record (IEEE Cat. No.03CH37515).
[4] Rong Zhou,et al. A simple smart time-to-digital convertor based on vernier method for a high resolution LYSO MicroPET , 2007, 2007 IEEE Nuclear Science Symposium Conference Record.
[5] Hongdi Li,et al. Design of an inexpensive high-sensitivity rodent-research PET camera (RRPET) , 2003, 2003 IEEE Nuclear Science Symposium. Conference Record (IEEE Cat. No.03CH37515).
[6] Jian Song,et al. A high-resolution time-to-digital converter implemented in field-programmable-gate-arrays , 2006, IEEE Transactions on Nuclear Science.
[7] S.S. Junnarkar,et al. An FPGA-based, 12-channel TDC and digital signal processing module for the RatCAP scanner , 2005, IEEE Nuclear Science Symposium Conference Record, 2005.
[8] J. Kalisz,et al. Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution , 1997 .
[9] Xiaohui Li,et al. High-Resolution and Multi-Channel Time Interval Counter Using Time-to-Digital Converter and FPGA , 2007, 2007 IEEE International Frequency Control Symposium Joint with the 21st European Frequency and Time Forum.
[10] Yu Wang,et al. A new pileup-prevention front-end electronic design for high-resolution PET and gamma cameras , 2001 .