Design of a high performance FPGA based fault injector for real-time safety-critical systems

Fault injection methods have long been used to assess fault tolerance and safety. However, many conventional fault injection methods face significant shortcomings, which hinder their ability to execute fault injections on target real-time safety-critical systems.

[1]  Luís Santos,et al.  Constraints on the Use of Boundary-Scan for Fault Injection , 2003, LADC.

[2]  A. Napieralski,et al.  USB-based Background Mode Debugger For Freescale Processors , 2006, Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006..

[3]  José Carlos Campelo,et al.  Temporal Characterization of Embedded Systems Using Nexus , 2006, 2006 Sixth European Dependable Computing Conference.

[4]  Gustavo Ribeiro Alves,et al.  A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures , 2008, SBCCI '08.

[5]  Gustavo Ribeiro Alves,et al.  Real time fault injection using a modified debugging infrastructure , 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

[6]  Peter Folkesson,et al.  Assessment and Application of Scan-Chain Implemented Fault Injection , 2003 .

[7]  Gustavo Ribeiro Alves,et al.  Using NEXUS compliant debuggers for real time fault injection on microprocessors , 2006, SBCCI '06.

[8]  Mario García-Valderas,et al.  A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors , 2007, 13th IEEE International On-Line Testing Symposium (IOLTS 2007).

[9]  Bradford G. Van Treuren,et al.  JTAG system test in a MicroTCA world , 2007, 2007 IEEE International Test Conference.

[10]  Maurizio Rebaudengo,et al.  Evaluating the fault tolerance capabilities of embedded systems via BDM , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).

[11]  Gustavo Ribeiro Alves,et al.  A Modified Debugging Infrastructure to Assist Real Time Fault Injection Campaigns , 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

[12]  Juan Pardo,et al.  On-chip debugging-based fault emulation for robustness evaluation of embedded software components , 2005, 11th Pacific Rim International Symposium on Dependable Computing (PRDC'05).

[13]  Michel Pignol.  Methodology and Tools Developed for Validation of COTS-based Fault-Tolerant Spacecraft Supercomputers , 2007, 13th IEEE International On-Line Testing Symposium (IOLTS 2007).

[14]  Bradford G. Van Treuren,et al.  A practical approach to comprehensive system test & debug using boundary scan based test architecture , 2007, 2007 IEEE International Test Conference.

[15]  Mário Zenha Rela,et al.  Can Software Implemented Fault-Injection Be Used on Real-Time Systems? , 1999, EDCC.