Automatic Code Generation for MPSoC Platform Starting From Simulink/Matlab : New Approach to Bridge the Gap between Algorithm and Architecture Design

This paper deals with the system level design flow and methodology for rapid prototyping of multiprocessor systems on chip (MPSoC) starting from Matlab/Simulink specification. The rise of the abstraction level when designing the hardware (HW) and software (SW) parts of MPSoC permits to master the growing complexity of these systems. However, it generates a huge gap between the concepts of system level specification and those used for implementation and synthesis of HW/SW MPSoC. In this paper, we propose a new approach to establish a bridge between the system level specification in Matlab/Simulink and the HW/SW architecture at the implementation level.

[1]  Stephen A. Edwards,et al.  The challenges of hardware synthesis from C-like languages , 2005, Design, Automation and Test in Europe.

[2]  Damien Lyonnard,et al.  Colif: A Design Representation for Application-Specific Multiprocessor SOCs , 2001, IEEE Des. Test Comput..

[3]  Kazutoshi Wakabayashi,et al.  C-based SoC design flow and EDA tools: an ASIC and system vendorperspective , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Nacer-Eddine Zergainoh,et al.  Matlab based environment for designing DSP systems using IP blocks , 2004 .

[5]  RauletM.,et al.  Rapid prototyping for heterogeneous multicomponent systems , 2006 .

[6]  Nacer-Eddine Zergainoh,et al.  Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[7]  Nacer-Eddine Zergainoh,et al.  Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems , 2006, EURASIP J. Adv. Signal Process..

[8]  Giovanni De Micheli,et al.  Synthesis of hardware models in C with pointers and complex data structures , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[9]  Amer Baghdadi,et al.  Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[10]  Linda M. Wills,et al.  Virtual Benchmarking and Model Continuity in Prototyping Embedded Multiprocessor Signal Processing Systems , 2002, IEEE Trans. Software Eng..

[11]  W. R. Davis,et al.  A design environment for high throughput, low power dedicated signal processing systems , 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

[12]  Alberto L. Sangiovanni-Vincentelli,et al.  System-level design: orthogonalization of concerns andplatform-based design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[13]  Edward A. Lee,et al.  Hyvisual: a Hybrid System Modeling Framework based on Ptolemy II , 2006, ADHS.

[14]  Amer Baghdadi,et al.  Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems , 2002, IEEE Trans. Software Eng..