SPIN-SIM: logic and fault simulation for speed-independent circuits

We present SPIN-SIM, a logic and fault simulator for speed-independent circuits, that extends the classical Eichelberger's method and overcomes its limitations. In order to improve simulation accuracy. SPIN-SIM adopts a 13-valued algebra, maintains the relative order of causal signal transitions, and unfolds time frames judiciously. In addition, complex gates are handled through replacement by pseudo-gate equivalents with regards to functionality, timing and faulty behavior. Experimental results show that SPIN-SIM incurs a negligible increase in computational time over Eichelberger's method, yet is much more accurate and achieves a significant improvement in fault coverage.