Model for 1/f; noise in MOS transistors biased in the linear region

Abstract 1/ f ; Noise calculations and experiments are presented for conductance fluctuations in inversion layers. The layers are biased in the ohmic region at very low drain-source voltages. The model makes use of an experimental fact that competing scattering mechanisms other than lattice scattering lead to a reduction of 1/ f ; noise, but does not consider trapping of charge carriers in surface states as the source of 1/ f ; noise. The free charge carrier distribution and a mobility profile play an important part in the model. The model describes the measured results well. A reduction of the effective mobility with increasing gate voltage is accompanied by a strong reduction of the noise.