Generating Optimal Linear Temporal Logic Monitors by Coinduction

A coinduction-based technique to generate an optimal monitor from a Linear Temporal Logic (LTL) formula is presented in this paper. Such a monitor receives a sequence of states (one at a time) from a running process, checks them against a requirements specification expressed as an LTL formula, and determines whether the formula has been violated or validated. It can also say whether the LTL formula is not monitorable any longer, i.e., that the formula can in the future neither be violated nor be validated. A Web interface for the presented algorithm adapted to extended regular expressions is available.

[1]  Grigore Rosu,et al.  Conditional Circular Coinductive Rewriting with Case Analysis , 2002, WADT.

[2]  守屋 悦朗,et al.  J.E.Hopcroft, J.D. Ullman 著, "Introduction to Automata Theory, Languages, and Computation", Addison-Wesley, A5変形版, X+418, \6,670, 1979 , 1980 .

[3]  Grigore Rosu,et al.  Java PathExplorer: A Runtime Verification Tool , 2001 .

[4]  Grigore Rosu,et al.  Monitoring programs using rewriting , 2001, Proceedings 16th Annual International Conference on Automated Software Engineering (ASE 2001).

[5]  Klaus Havelund,et al.  Model checking JAVA programs using JAVA PathFinder , 2000, International Journal on Software Tools for Technology Transfer.

[6]  Scott D. Stoller,et al.  Model-checking multi-threaded distributed Java programs , 2000, International Journal on Software Tools for Technology Transfer.

[7]  Grigore Rosu,et al.  Circular coinductive rewriting , 2000, Proceedings ASE 2000. Fifteenth IEEE International Conference on Automated Software Engineering.

[8]  Dimitra Giannakopoulou,et al.  Automata-based verification of temporal properties on running programs , 2001, Proceedings 16th Annual International Conference on Automated Software Engineering (ASE 2001).

[9]  Grigore Rosu,et al.  Synthesizing Monitors for Safety Properties , 2002, TACAS.

[10]  Mahesh Viswanathan,et al.  Java-MaC: a Run-time Assurance Tool for Java Programs , 2001, RV@CAV.

[11]  Orna Kupferman,et al.  Model Checking of Safety Properties , 1999, Formal Methods Syst. Des..

[12]  Debra J. Richardson,et al.  Specification-based test oracles for reactive systems , 1992, International Conference on Software Engineering.

[13]  Koushik Sen,et al.  Runtime safety analysis of multithreaded programs , 2003, ESEC/FSE-11.

[14]  Jieh Hsiang,et al.  Refutational Theorem Proving Using Term-Rewriting Systems , 1985, Artif. Intell..

[15]  Klaus Havelund,et al.  Model Checking Programs , 2004, Automated Software Engineering.

[16]  Mahesh Viswanathan,et al.  Testing Extended Regular Language Membership Incrementally by Rewriting , 2003, RTA.

[17]  Doron Drusinsky,et al.  The Temporal Rover and the ATG Rover , 2000, SPIN.

[18]  SymposiumT. Owen O'MalleyDept Eecient Speciication-based Oracles for Critical Systems , 1996 .

[19]  Jeffrey D. Ullman,et al.  Introduction to Automata Theory, Languages and Computation , 1979 .

[20]  Mahesh Viswanathan,et al.  Runtime Assurance Based On Formal Specifications , 1999, PDPTA.

[21]  Bowen Alpern,et al.  Defining Liveness , 1984, Inf. Process. Lett..

[22]  Zohar Manna,et al.  Temporal verification of reactive systems - safety , 1995 .

[23]  Bernd Finkbeiner,et al.  An Update on STeP: Deductive-Algorithmic Verification of Reactive Systems , 1998, Tool Support for System Specification, Development and Verification.

[24]  Orna Kupferman,et al.  Freedom, weakness, and determinism: from linear-time to branching-time , 1998, Proceedings. Thirteenth Annual IEEE Symposium on Logic in Computer Science (Cat. No.98CB36226).

[25]  Marc Geilen,et al.  On the Construction of Monitors for Temporal Logic Properties , 2001, RV@CAV.

[26]  Koushik Sen,et al.  Generating Optimal Monitors for Extended Regular Expressions , 2003, RV@CAV.