FPGA Implementation of 2-D DCT-based Distributed Arithmetic

This paper presents a very highperformance 2D Discrete Cosine Transform(DCT) processor using the Field Programmable Gate Array(FPGA) for realtime applications.The architecture exploits the transform separability and uses a rowcolumn decomposition to implement a 2D DCT using two 1D DCT in series.The row and column processors are realized using multiplieraccumulator based on the Distributed Algorithm(DA) techniques,which has been contributed to reduce hardware requirement and achieve high speed operation.At the end of this paper,the FPGA implementation and simulation results are provided.