The Design of a Low-Voltage Rail-to-Rail CMOS Operational Amplifier

A low power consumption rail-to-rail CMOS operational amplifier is designed in this paper. It reaches rail-to-rail common mode input range, for it adopt a complementary input differential pairs which is controlled by a level shifter. A current-driven common source amplifier which is biased on class AB constitute the output stage. In order to get enough gain and to deal with wider level range, the folded-cascode structure is used as preamplifier. Based on TSMC 0.25 - mixed - signal model and with a single 1.8V supply , the whole circuit is simulated in Cadence Spectre.The simulation results indicates that the dc gain is 80.18dB while phase margin is 65°, and 336W power dissipation. For it's simple and compact structure , this operational amplifier cell is suitable for low voltage application.