Interactive Compaction Router for VLSI Layout
暂无分享,去创建一个
This paper describes an interactive router for compacting building block VLSI layout. It allows the designer to manipulate the functional block location on the CRT display without breaking interconnections between functional blocks. Following the movement of a functional block, it reroutes the wirings so as to retain interconnections with keeping the layout obeying design rules. The interactive compaction router provides an efficient tool to achieve a minimum chip area layout design.
[1] Hiroyuki Watanabe,et al. Graph-Optimization Techniques for IC Layout and Compaction , 1983, 20th Design Automation Conference Proceedings.
[2] Sheldon B. Akers,et al. IC mask layout with a single conductor layer , 1970, DAC '70.
[3] A. E. Dunlop. SLIM-the translation of symbolic layouts into mask data , 1980, DAC '80.