Modeling and impedance analysis of power distribution network in 3D ICs with TSVs
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[1] Junho Lee,et al. High-Frequency Scalable Modeling and Analysis of a Differential Signal Through-Silicon Via , 2014, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[2] Tzong-Lin Wu,et al. A New Model for Through-Silicon Vias on 3-D IC Using Conformal Mapping Method , 2012, IEEE Microwave and Wireless Components Letters.
[3] Yangyang Yan,et al. Electrical Characterization of Coaxial Silicon–Insulator–Silicon Through-Silicon Vias: Theoretical Analysis and Experiments , 2016, IEEE Transactions on Electron Devices.
[4] M. Swaminathan,et al. Electromagnetic Modeling of Through-Silicon Via (TSV) Interconnections Using Cylindrical Modal Basis Functions , 2010, IEEE Transactions on Advanced Packaging.
[5] Taigon Song,et al. PDN Impedance Modeling and Analysis of 3D TSV IC by Using Proposed P/G TSV Array Model Based on Separated P/G TSV and Chip-PDN Models , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[6] Junho Lee,et al. Interposer Power Distribution Network (PDN) Modeling Using a Segmentation Method for 3-D ICs With TSVs , 2013, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[7] Chulsoon Hwang,et al. Capacitance-Enhanced Through-Silicon Via for Power Distribution Networks in 3D ICs , 2016, IEEE Electron Device Letters.
[8] W. Dehaene,et al. Electrical Modeling and Characterization of Through Silicon via for Three-Dimensional ICs , 2010, IEEE Transactions on Electron Devices.