A 1.8 V high dynamic-range CMOS high-speed four quadrant multiplier

A low-voltage (/spl les/3 V) CMOS four quadrant multiple is introduced which has an almost rail-to-rail differential-input-swing with a low signal-distortion (/spl les/1% for 100 kHz signal). The proposed circuit is composed of a pair of rail-to-rail differential-input V-I converters and a pair of voltage-followers. This topology of multiplier results in a high frequency capability with low power consumption. In a 1.2 /spl mu/m n-well CMOS process, the 3 dB frequency of the multiplier is in a range of 103 MHz. Measured total power consumption is around 0.52 mW with supply voltage 2 V. The multiplier can operate at a minimum supply voltage of 1.8 V.

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