Design Exploration of Hybrid CMOS and Memristor Circuit by New Modified Nodal Analysis

Design of hybrid circuits and systems based on CMOS and nano-device requires rethinking of fundamental circuit analysis to aid design exploration. Conventional circuit analysis with modified nodal analysis (MNA) cannot consider new nano-devices such as memristor together with the traditional CMOS devices. This paper has introduced a new MNA method with magnetic flux (Φ) as new state variable. New SPICE-like circuit simulator is thereby developed for the design of hybrid CMOS and memristor circuits. A number of CMOS and memristor-based designs are explored, such as oscillator, chaotic circuit, programmable logic, analog-learning circuit, and crossbar memory, where their functionality, performance, reliability and power can be efficiently verified by the newly developed simulator. Specifically, one new 3-D-crossbar architecture with diode-added memristor is also proposed to improve integration density and to avoid sneak path during read-write operation.

[1]  R. Waser,et al.  Nanoionics-based resistive switching memories. , 2007, Nature materials.

[2]  G. Snider,et al.  Self-organized computation with unreliable, memristive nanodevices , 2007 .

[3]  Wei Wu,et al.  A hybrid nanomemristor/transistor logic circuit capable of self-programming , 2009, Proceedings of the National Academy of Sciences.

[4]  Michael T. Niemier,et al.  Design and defect tolerance beyond CMOS , 2008, CODES+ISSS '08.

[5]  M.L. Liou,et al.  Computer-aided analysis of electronic circuits: Algorithms and computational techniques , 1977, Proceedings of the IEEE.

[6]  R. Stanley Williams,et al.  Nanoelectronic architectures , 2005 .

[7]  Albert E. Ruehli,et al.  The modified nodal approach to network analysis , 1975 .

[8]  Leon O. Chua,et al.  Computer-Aided Analysis Of Electronic Circuits , 1975 .

[9]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[10]  Massimiliano Di Ventra,et al.  Memristive model of amoeba learning. , 2008, Physical review. E, Statistical, nonlinear, and soft matter physics.

[11]  R. Waser,et al.  A Nonvolatile Memory With Resistively Switching Methyl-Silsesquioxane , 2009, IEEE Electron Device Letters.

[12]  Yiyu Shi,et al.  A Fast Block Structure Preserving Model Order Reduction for Inverse Inductance Circuits , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

[13]  Kyungmin Kim,et al.  Memristor-based fine resolution programmable resistance and its applications , 2009, 2009 International Conference on Communications, Circuits and Systems.

[14]  Mircea R. Stan,et al.  CMOS/nano co-design for crossbar-based molecular electronic systems , 2003 .

[15]  Uri M. Ascher,et al.  Computer methods for ordinary differential equations and differential-algebraic equations , 1998 .

[16]  Seth Copen Goldstein,et al.  Molecular electronics: from devices and interconnect to circuits and architecture , 2003, Proc. IEEE.

[17]  Yiran Chen,et al.  Compact modeling and corner analysis of spintronic memristor , 2009, 2009 IEEE/ACM International Symposium on Nanoscale Architectures.

[18]  Lin Zhong,et al.  Nanowire Crossbar Logic and Standard Cell-Based Integration , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[19]  T.G. Noll,et al.  Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[20]  R. J. Luyken,et al.  Concepts for hybrid CMOS-molecular non-volatile memories , 2003 .

[21]  Mei Liu,et al.  Three-dimensional CMOL: three-dimensional integration of CMOS/nanomaterial hybrid digital circuits , 2007 .

[22]  R. Rosezin,et al.  High density 3D memory architecture based on the resistive switching effect , 2009 .

[23]  A. Ayatollahi,et al.  Implementation of biologically plausible spiking neural network models on the memristor crossbar-based CMOS/nano circuits , 2009, 2009 European Conference on Circuit Theory and Design.

[24]  Wei Yang Lu,et al.  Nanoscale memristor device as synapse in neuromorphic systems. , 2010, Nano letters.

[25]  B. Mouttet Logicless Computational Architectures with Nanoscale Crossbar Arrays , 2008 .

[26]  L. Chua Memristor-The missing circuit element , 1971 .

[27]  H. Wong,et al.  Ultralow Voltage Crossbar Nonvolatile Memory Based on Energy-Reversible NEM Switches , 2009, IEEE Electron Device Letters.

[28]  P. Vontobel,et al.  Writing to and reading from a nano-scale crossbar memory based on memristors , 2009, Nanotechnology.

[29]  Hsien-Hsin S. Lee,et al.  Architectural evaluation of 3D stacked RRAM caches , 2009, 2009 IEEE International Conference on 3D System Integration.

[30]  Ahmad Ayatollahi,et al.  STDP implementation using memristive nanodevice in CMOS-Nano neuromorphic networks , 2009, IEICE Electron. Express.

[31]  L.O. Chua,et al.  Memristive devices and systems , 1976, Proceedings of the IEEE.

[32]  R. Williams,et al.  Nano/CMOS architectures using a field-programmable nanowire interconnect , 2007 .