A tunnel-FET SRAM array for energy-efficient embedded memory blocks in reconfigurable computing platforms
暂无分享,去创建一个
Saibal Mukhopadhyay | Amit Ranjan Trivedi | Mohammad Faisal Amir | S. Mukhopadhyay | M. Amir | A. Trivedi
[1] Jason Cong,et al. Performance-driven technology mapping for heterogeneous FPGAs , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[2] Vaughn Betz,et al. Architecture and CAD for Deep-Submicron FPGAS , 1999, The Springer International Series in Engineering and Computer Science.
[3] S. Sedlmaier,et al. Vertical tunnel field-effect transistor , 2004, IEEE Transactions on Electron Devices.
[4] Swarup Bhunia,et al. Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach , 2011, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.
[5] Scott Hauck,et al. Reconfigurable computing: a survey of systems and software , 2002, CSUR.