A tunnel-FET SRAM array for energy-efficient embedded memory blocks in reconfigurable computing platforms

This paper studies the potential of Si-Ge TFET for low-power embedded memory blocks in reconfigurable platforms. The key observations from the comparative analysis of FinFET and TFET based EMB are summarized in Fig. 14. At low frequency, switching to the TFET cell from FinFET provides lower read power but degrades read stability, which can be improved through circuit techniques (TFETB). However, as the frequency increases, the TFET advantages begin to decrease, and eventually for high frequency target TFET may become more power hungry than FinFET. The analysis shows the potential of using TFET for designing memory for low-power reconfigurable platform with relaxed performance targets.

[1]  Jason Cong,et al.  Performance-driven technology mapping for heterogeneous FPGAs , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Vaughn Betz,et al.  Architecture and CAD for Deep-Submicron FPGAS , 1999, The Springer International Series in Engineering and Computer Science.

[3]  S. Sedlmaier,et al.  Vertical tunnel field-effect transistor , 2004, IEEE Transactions on Electron Devices.

[4]  Swarup Bhunia,et al.  Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach , 2011, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[5]  Scott Hauck,et al.  Reconfigurable computing: a survey of systems and software , 2002, CSUR.