Animating the Semantics of VERILOG using Prolog

Eclogue:1 The logic programming language Prolog is used to provide a rapid-prototype simulator for the VERILOG Hardware Description Language (HDL). The simulator is based on an operational semantics of a significant subset of the language. Using this approach allows the exploration of sometimes subtle behaviours of parallel programs and the possibility of rapid changes or additions to the semantics of the language covered. It also acts as a check on the validity of the original operational semantics. 1Eclogue, n. [L. ecloga, Gr. ? a selection, choice extracts, fr. ? to pick out, choose out; ? out + ? to gather, choose: cf. F. egloque, ecloque.] Source: Webster’s Revised Unabridged Dictionary via http://www.dictionary.com/. Jonathan Bowen is a lecturer at the Department of Computer Science, The University of Reading, UK. His research interests include formal methods, safety-critical systems, the Z notation, provably correct systems, rapid prototyping using logic programming, decompilation, hardware compilation, software/hardware co-design and on-line museums. Travelogue: Jonathan Bowen was on leave as a Visiting Research Fellow at UNU/IIST in Macau from 19 July to 10 September 1999. The research reported here was undertaken during this period. Contact information: Jonathan Bowen Department of Computer Science The University of Reading Whiteknights, PO Box 225 READING Berkshire RG6 6AY UNITED KINGDOM Email: J.P.Bowen@reading.ac.uk URL: http://www.cs.reading.ac.uk/people/jpb/ Dedicated to Prof. C.A.R. Hoare, FRS on the occasion of his retirement It is necessary to be slightly underemployed if you want to do something significant. — James Crick (1928–), The Eighth Day of Creation Copyright c 1999 by UNU/IIST, Jonathan Bowen

[1]  Norbert E. Fuchs.  Specifications are (preferably) executable , 1992, Softw. Eng. J..

[2]  C. Pollard,et al.  Center for the Study of Language and Information , 2022 .

[3]  Jifeng He,et al.  An Operational Semantics of a Simulator Algorithm , 2000, PDPTA.

[4]  Bishop C. Brock,et al.  Formal Analysis of the Motorola CAP DSP , 1999 .

[5]  Jifeng He.  Provably Correct Systems: Modelling of Communication Languages and Design of Optimized Compilers , 1994 .

[6]  Jonathan P. Bowen.  From Programs to Object Code using Logic and Logic Programming , 1991, Code Generation.

[7]  Carlos Delgado Kloos,et al.  Formal Semantics for VHDL , 1995 .

[8]  Jifeng He.  A Behavioral Model for Co-design , 1999, World Congress on Formal Methods.

[9]  Yves Bertot,et al.  Reasoning with Executable Specifications , 1995, TAPSOFT.

[10]  Michael J. C. Gordon,et al.  The semantic challenge of Verilog HDL , 1995, Proceedings of Tenth Annual IEEE Symposium on Logic in Computer Science.

[11]  Peter J. Stuckey,et al.  Programming with Constraints: An Introduction , 1998 .

[12]  Jonathan P. Bowen.  From programs to object code and back again using logic programming: Compilation and decompilation , 1993, J. Softw. Maintenance Res. Pract..

[13]  Flemming Nielson,et al.  Semantics with applications - a formal introduction , 1992, Wiley professional computing.

[14]  Leslie Lamport,et al.  Latex : A Document Preparation System , 1985 .

[15]  Jifeng He,et al.  A theory of combinational programs , 2001, Proceedings Eighth Asia-Pacific Software Engineering Conference.

[16]  Ieee Standards Board.  IEEE Standard hardware Description language : based on the Verilog hardware description language , 1996 .

[17]  Jifeng He,et al.  A Common Framework for Mixed Hardware/Software Systems , 1999, IFM.

[18]  Formal Verification of the Aamp5 Microprocessor 1 2.1 Aamp Family of Microprocessors 2.2 Pvs 2.3 Historical Perspective/scale of the Challenge 2.4 Overview of the Technical Approach , 2022 .

[19]  C. A. R. Hoare,et al.  Laws of programming , 1987, CACM.

[20]  Gerardo Schneider,et al.  Towards an Operational Semantics of Verilog , 1998 .

[21]  C. A. R. Hoare,et al.  An Algebraic Approach to Verifiable Compiling Specification and Prototyping of the Procos Level 0 Programming Language , 1990 .

[22]  Jonathan P. Bowen,et al.  High-Integrity System Specification and Design , 1999 .

[23]  Jifeng He,et al.  Time interval semantics and implementation of a real-time programming language , 1992, Fourth Euromicro workshop on Real-Time Systems.

[24]  Augusto Sampaio,et al.  ParTS: A Partitioning Transformation System , 1999, World Congress on Formal Methods.

[25]  Ernst-Rüdiger Olderog,et al.  A ProCoS II Project Final Report: ESPRIT Basic Research project 7071 , 1996 .

[26]  Jonathan P. Bowen.  A Brief History of Algebra and Computing: An Eclectic Oxonian View , 2002 .

[27]  C. Seger,et al.  Formally Verifying IEEE Compliance of Floating-Point Hardware , 2022 .

[28]  Cliff B. Jones,et al.  Specifications are not (necessarily) executable , 1989 .

[29]  Niklaus Wirth.  Hardware Compilation: Translating Programs into Circuits , 1998, Computer.

[30]  Jonathan P. Bowen.  Towards Verified Systems , 1994 .

[31]  Ulrich Golze.  VLSI Chip Design with the Hardware Description Language VERILOG , 1996, Springer Berlin Heidelberg.

[32]  Jonathan P. Bowen,et al.  Industrial-Strength Formal Methods in Practice , 1999, Formal Approaches to Computing and Information Technology (FACIT).

[33]  T. Van Dung,et al.  A theory of combinational programs , 2001 .

[34]  W. F. Clocksin.  Logic Programming and Digital Circuit Analysis , 1987, J. Log. Program..

[35]  C. A. R. Hoare,et al.  The Laws of Occam Programming , 1988, Theor. Comput. Sci..

[36]  Jonathan P. Bowen,et al.  High-Integrity System Specification and Design , 1999, Formal Approaches to Computing and Information Technology (FACIT).

[37]  William F. Clocksin,et al.  Programming in Prolog , 1987, Springer Berlin Heidelberg.

[38]  Donald E. Knuth,et al.  Literate Programming , 1984, Comput. J..

[39]  Ian Page.  Constructing hardware-software systems from a single description , 1996, J. VLSI Signal Process..

[40]  Jifeng He,et al.  Towards a Provably Correct Hardware Implementation of Occam , 1993, CHARME.