Redistribution Layers (RDLs) for 2.5D/3D IC Integration

Redistribution layer (RDL) is an integral part of 3D IC integration, especially for 2.5D IC integration with a passive interposer. The RDL allows for fans out of the circuitries and allows the lateral communication between the chips attached to the interposer. There are at least two ways to fabricate the RDL, namely (a) polymers to make the passivation and Cu-plating to make the metal layer, and (b) semiconductor back-end-of-line Cu damascene. In this study, the materials and processes of these methods are presented. Emphasis is placed on the Cu damascene method.

[1]  B. Banijamali,et al.  Outstanding and innovative reliability study of 3D TSV interposer and fine pitch solder micro-bumps , 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

[2]  Tai Chong Chai,et al.  Development of Large Die Fine-Pitch Cu/Low- $k$ FCBGA Package With Through Silicon via (TSV) Interposer , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[3]  H. Hedler,et al.  An embedded device technology based on a molded reconfigured wafer , 2006, 56th Electronic Components and Technology Conference 2006.

[4]  C. Selvanayagam,et al.  Nonlinear Thermal Stress/Strain Analyses of Copper Filled TSV (Through Silicon Via) and Their Flip-Chip Microbumps , 2009, IEEE Transactions on Advanced Packaging.

[5]  R. Chaware,et al.  Assembly and reliability challenges in 3D integration of 28nm FPGA die on a large high density 65nm passive interposer , 2012, 2012 IEEE 62nd Electronic Components and Technology Conference.

[6]  John H. Lau,et al.  Development of through silicon via (TSV) interposer technology for large die (21×21mm) fine-pitch Cu/low-k FCBGA package , 2009, 2009 59th Electronic Components and Technology Conference.