During the wafer fabrication process, wafers warp into different kinds of shapes, such as spherical, cylindrical, or saddles. These wafers may exhibit a bistable state, that is, if we apply a certain amount of pressure, they snap into another state. Though these shapes are commonly observed in the real world, we have found that it is extremely difficult to obtain these shapes in finite-element tools, such as ANSYS, because some of these states are not numerically preferred solutions. In this paper, we discuss various methodologies we have used to obtain these shapes in ANSYS. The experiments have been carried out in our fabrication lab to measure the wafer warpage at various stages of wafer fabrication. We have found that when the simulated shape matches the experiment, the warpage or maximum out of plane displacement of the wafer obtained from our simulation matches with 1% with the experimental results as well. Furthermore, ANSYS simulations show that backgrinding increases the warpage by the same amount as observed in the experiments. This paper also discusses the limitations of Stoney's formula. The final goal of this paper is to predict how warpage is going to affect the stresses in the silicon (Si) trenches in a device and if any particular trench design is going to lower the amount of wafer warpage, hence the stresses in Si trenches. Section IV shows the simulation results of stresses in the Si trenches. Since it would be computationally infeasible to model a full wafer having all the details of the trench structures, a submodeling technique has been adopted to calculate the stresses in the Si trench wall of a warped wafer. These simulation results are compared with micro-Raman spectroscopy measurements of a warped wafer.
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