A 1 GHz, low-phase-noise CMOS frequency synthesizer with integrated LC VCO for wireless communications
暂无分享,去创建一个
A 1 GHz, low-phase-noise CMOS frequency synthesizer with an on-chip LC VCO is presented. The synthesizer has 64 programmable frequency channels with a frequency resolution of f/sub ref//64 and the phase noise of -110 dBc/Hz at a 200 kHz offset frequency. The reference sideband spurs are -73.5 dBc. The prototype is implemented in a 0.5 /spl mu/m CMOS process with three metal layers. The active chip area is 3.2 mm/sup 2/ and the prototype dissipates 43 mW, including the VCO buffer power dissipation, from a 3.3 V supply voltage.
[1] M. Steyaert,et al. A 1.8-GHz low-phase-noise spiral-LC CMOS VCO , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.
[2] Ulrich L. Rohde. Digital pll frequency synthesizers: theory and design , 1983 .
[3] B. Miller,et al. A multiple modulator fractional divider , 1990, 44th Annual Symposium on Frequency Control.