An empirical approach to finding energy efficient ADC architectures
暂无分享,去创建一个
[1] Geert Van der Plas,et al. A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.
[2] Eric A. M. Klumperink,et al. A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[3] Bengt E. Jonsson. A survey of A/D-Converter performance evolution , 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.
[4] Jan Craninckx,et al. A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[5] Franco Maloberti,et al. Design considerations on low-voltage low-power data converters , 1995 .
[6] Kafai Leung,et al. A Dual Low Power 1/2 LSB NL 16b/1Msample/s SAR A/D Converter with on-chip Microcontroller , 2006, 2006 IEEE Asian Solid-State Circuits Conference.
[7] K. G. Merkel,et al. A survey of high performance analog-to-digital converters for defense space applications , 2003, 2003 IEEE Aerospace Conference Proceedings (Cat. No.03TH8652).
[8] Shoji Kawahito,et al. Low-Power Design of Pipeline A/D Converters , 2006, IEEE Custom Integrated Circuits Conference 2006.
[9] N. Krishnapura,et al. A 90μW 15-bit ΔΣ ADC for digital audio , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.
[10] Boris Murmann,et al. A/D converter trends: Power dissipation, scaling and digitally assisted architectures , 2008, 2008 IEEE Custom Integrated Circuits Conference.
[11] Gunhee Han,et al. A 0.7V 36μW 85dB-DR Audio ΔΣ Modulator Using Class-C Inverter , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[12] Dirk Weiler,et al. Theoretical and practical minimum of the power Consumption of 3 ADCs in SC technique , 2007, 2007 18th European Conference on Circuit Theory and Design.
[13] Luc Astier,et al. Power consumption of A/D converters for software radio applications , 2000, IEEE Trans. Veh. Technol..
[14] Robert H. Walden,et al. Analog-to-digital converter survey and analysis , 1999, IEEE J. Sel. Areas Commun..
[15] D.K. Su,et al. A 0.7-V 100-dB 870-μW digital audio ΣΔ modulator , 2008, 2008 IEEE Symposium on VLSI Circuits.
[16] Wismar,et al. A 0 . 2 V 0 . 44 μ W 20 kHz Analog to Digital Modulator with 57 fJ / conversion FoM , 2009 .
[17] Jan Craninckx,et al. A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[18] Shanthi Pavan,et al. A 110µW single bit audio continuous-time oversampled converter with 92.5 db dynamic range , 2009, 2009 Proceedings of ESSCIRC.
[19] Soon-Jyh Chang,et al. A 5b 800MS/s 2mW asynchronous binary-search ADC in 65nm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[20] Geert Van der Plas,et al. A 150 MS/s 133$~\mu$W 7 bit ADC in 90 nm Digital CMOS , 2008, IEEE Journal of Solid-State Circuits.
[21] Bengt E. Jonsson. On CMOS scaling and A/D-converter performance , 2010, NORCHIP 2010.
[22] S. Andersson,et al. On the power consumption of analog to digital converters , 2006, 2006 NORCHIP.
[23] Boris Murmann,et al. Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[24] F. Maloberti,et al. A 107.4 dB SNR Multi-Bit Sigma Delta ADC With 1-PPM THD at $-$0.12 dB From Full Scale Input , 2009, IEEE Journal of Solid-State Circuits.