Analysis and design of a low-voltage RF CMOS mixer

A CMOS low-voltage downconversion mixer is presented. With 1.69-GHz local oscillator signal input and 1.63-GHz RF signal input, measurement results show that the conversion gain is 6.631 dB, input-referred third-order intercept point is 1.51 dBm, single-sideband noise figure is 21.43 dB with a 1.8-V supply voltage. The mixer's noise and linearity analysis, layout technique to maximize RF performance and minimize noise performance are also presented in this paper.

[1]  Theerachet Soorapanth,et al.  RF Linearity of Short-Channel MOSFETs , 1997 .

[2]  Cmos Lna Linearity, Noise Optimization for Two Stage RF , 2001 .

[3]  Robert W. Dutton,et al.  Issues in high frequency noise simulation for deep submicron MOSFETs , 2000 .

[4]  Hong Mo Wang A 1 V multi-gigahertz RF mixer core in 0.5 μm CMOS , 1998 .

[5]  Wu-Shiung Feng,et al.  A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[6]  H. Wang A 1 V multi-gigahertz RF mixer core in 0.5 /spl mu/m CMOS , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[7]  Howard C. Luong,et al.  A 2-V 900-MHz CMOS mixer for GSM receivers , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[8]  Zhihua Wang,et al.  Calculation of intermodulation distortion in CMOS transconductance stage , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[9]  Qiang Li,et al.  CMOS RF mixer no-linearity design , 2001, Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257).

[10]  Hyun Kyu Yu,et al.  Linearity, noise optimization for two stage RF CMOS LNA , 2001, Proceedings of IEEE Region 10 International Conference on Electrical and Electronic Technology. TENCON 2001 (Cat. No.01CH37239).

[11]  Cheon Soo Kim,et al.  Gate layout and bonding pad structure of a RF n-MOSFET for low noise performance , 2000, IEEE Electron Device Letters.