C-V and gate tunneling current characterization of ultra-thin gate oxide MOS (t/sub ox/=1.3-1.8 nm)

Direct tunneling of ultra-thin gate oxides results in exponential increases in gate leakage current (Lo et al, 1997). Moreover, the loss of inversion charge due to the carrier quantization then becomes significant. Hence, more physically accurate models are urgently needed. In this paper, an equivalent circuit approach considering the gate tunneling current as well as other QM effects is presented to characterize these phenomena for gate oxide thicknesses ranging from 1.3-1.8 nm.

[1]  G. Klimeck,et al.  Physical oxide thickness extraction and verification using quantum mechanical simulation , 1997, International Electron Devices Meeting. IEDM Technical Digest.

[2]  Han,et al.  Modeling And Characterization Of N/sup +/- And P/sup +/-polysilicon-gated Ultra Thin Oxides (21-26 /spl Aring/) , 1997, 1997 Symposium on VLSI Technology.