A V-band self-healing power amplifier with adaptive feedback bias control in 65 nm CMOS

A self-healing two-stage 60 GHz power amplifier (PA) with amplitude/phase compensation is realized in 65 nm CMOS. An adaptive feedback bias scheme with three control knobs is proposed to extend the linear operating region and enhance chip-to-chip performance yield; allowing a 5.5 dB improvement of the output 1-dB compression point (P1dB) and a less than 2% chip-to-chip gain variation. At a 1 V supply, the fully differential PA achieves a saturation output power (Psat) of 14.85 dBm with a peak power-added-efficiency (PAE) of 16.2%. With the on-chip amplitude compensation, the P1dB is extended to 13.7 dBm. With the on-chip phase compensation, the output phase variation is minimized to less than 0.5 degree. To the best of our knowledge, this PA provides the highest Psat and P1dB with simultaneous high PAE for a single PA reported to date. The PA delivers a linear gain of 9.7 dB and has a 7 GHz bandwidth from 55.5 to 62.5 GHz with a very compact area of 0.042 mm2.

[1]  L.E. Larson,et al.  A capacitance-compensation technique for improved linearity in CMOS class-AB power amplifiers , 2004, IEEE Journal of Solid-State Circuits.

[2]  Steven Thijs,et al.  50-to-67GHz ESD-protected power amplifiers in digital 45nm LP CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[3]  Hiroshi Kondoh,et al.  60GHz and 80GHz wide band power amplifier MMICs in 90nm CMOS technology , 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

[4]  W. L. Chan,et al.  A 60GHz-band 1V 11.5dBm power amplifier with 11% PAE in 65nm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[5]  Ali M. Niknejad,et al.  Current combining 60GHz CMOS power amplifiers , 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

[6]  L Moquillon,et al.  DC hot carrier stress effect on CMOS 65nm 60 GHz power amplifiers , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[7]  Michael Boers,et al.  A 60GHz transformer coupled amplifier in 65nm digital CMOS , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[8]  Eric Kerherve,et al.  RF-pad, Transmission Lines and balun optimization for 60GHz 65nm CMOS Power Amplifier , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[9]  Didier Belot,et al.  A 53-to-68GHz 18dBm power amplifier with an 8-way combiner in standard 65nm CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).