Möbius: A high performance transactional SSD with rich primitives

Providing transactional primitives of NAND flash based solid state disks (SSDs) have demonstrated a great potential for high performance transaction processing and relieving software complexity. Similar with software solutions like write-ahead logging (WAL) and shadow paging, transactional SSD has two parts of overhead which include: 1) write overhead under normal condition, and 2) recovery overhead after power failures. Prior transactional SSD designs utilize out-of-band (OOB) area in flash pages to store transaction information to reduce the first part of overhead. However, they are required to scan a large part of or even whole SSD after power failures to abort unfinished transactions. Another limitation of prior approaches is the unicity of transactional primitive they provided. In this paper, we propose a new transactional SSD design named Möbius. Möbius provides different types of transactional primitives to support static and dynamic transactions separately. Möbius flash translation layer (mFTL), which combines normal FTL with transaction processing by storing mapping and transaction information together in a physical flash page as atom inode. By amortizing the cost of transaction processing with FTL persistence, MFTL achieve high performance in normal condition and does not increase write amplification ratio. After power failures, Möbius can leverage atom inode to eliminate unnecessary scanning and recover quickly. We implemented a prototype of Möbius and compare it with other state-of-art transactional SSD designs. Experimental results show that Möbius can at most 67% outperform in transaction throughput (TPS) and 29 times outperform in recovery time while still have similar or even better write amphfication ratio comparing with prior hardware approaches.

[1]  Rajesh Gupta,et al.  From ARIES to MARS: transaction support for next-generation, solid-state drives , 2013, SOSP.

[2]  Michael Stonebraker,et al.  Transaction Support in Read Optimizied and Write Optimized File Systems , 1990, VLDB.

[3]  Peter Desnoyers,et al.  What Systems Researchers Need to Know about NAND Flash , 2013, HotStorage.

[4]  Bruce Jacob,et al.  The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization , 2009, ISCA '09.

[5]  Youngjae Kim,et al.  DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings , 2009, ASPLOS.

[6]  Shuai Li,et al.  LightTx: A lightweight transactional design in flash-based SSDs to support flexible transactions , 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

[7]  Andrea C. Arpaci-Dusseau,et al.  A Study of Linux File System Evolution , 2013, FAST.

[8]  Sivan Toledo,et al.  A Transactional Flash File System for Microcontrollers , 2005, USENIX Annual Technical Conference, General Track.

[9]  Maurice Herlihy,et al.  Transactional Memory: Architectural Support For Lock-free Data Structures , 1993, Proceedings of the 20th Annual International Symposium on Computer Architecture.

[10]  Lidong Zhou,et al.  Transactional Flash , 2008, OSDI.

[11]  Dhabaleswar K. Panda,et al.  Beyond block I/O: Rethinking traditional storage primitives , 2011, 2011 IEEE 17th International Symposium on High Performance Computer Architecture.

[12]  Erez Zadok,et al.  Extending ACID semantics to the file system , 2007, TOS.

[13]  Youngjae Kim,et al.  FlashSim: A Simulator for NAND Flash-Based Solid-State Drives , 2009, 2009 First International Conference on Advances in System Simulation.

[14]  Yeonseung Ryu,et al.  PORCE: An efficient power off recovery scheme for flash memory , 2008, J. Syst. Archit..

[15]  Andreas Reuter,et al.  Transaction Processing: Concepts and Techniques , 1992 .

[16]  Michael Isard,et al.  A design for high-performance flash disks , 2007, OPSR.

[17]  Shan Lu,et al.  Understanding and detecting real-world performance bugs , 2012, PLDI.

[18]  Sang Lyul Min,et al.  A space-efficient flash translation layer for CompactFlash systems , 2002, IEEE Trans. Consumer Electron..

[19]  Simon L. Peyton Jones,et al.  Composable memory transactions , 2005, CACM.

[20]  Kunle Olukotun,et al.  Transactional memory coherence and consistency , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

[21]  Sang-Won Lee,et al.  Crash Recovery in FAST FTL , 2010, SEUS.