Aging-Temperature-and-Propagation Induced Pulse-Broadening Aware Soft Error Rate Estimation for nano-Scale CMOS

This paper presents an aging-temperature-and-propagation induced pulse-broadening aware soft error rate (SER) estimation for nano-scale CMOS. To calculate the SER of circuits, logical masking effect, electrical effect and timing masking effect should be considered. In logical masking effect, a hybrid method using four-value probability and two-value probability is used; in electrical effect, pulse broadening induced by aging, temperature and PIPB is measured; in timing masking effect, failure rate of circuits is calculated. Finally, the SER of circuits is calculated using our proposed framework. Simulation results show that the average SER-increase of ISCAS'85 circuits is 61.2% under temperature from 0 to 120°C, 17.5% under aging from 0 to 10 years, and 137.8% under temperature-and-aging from 0°C-0 year to 120°C-10 years. The SER estimation efficiency and accuracy are ensured using Monte Carlo method.

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