A parallel compact genetic algorithm for multi-FPGA partitioning

In this paper we investigate the design of a compact genetic algorithm to solve multi-FPGA partitioning problems. Nowadays Multi-FPGA systems are used for a great variety of applications such as dynamically reconfigurable hardware applications, digital circuit emulation, and numerical computation. Both a sequential and a parallel version of a compact genetic algorithm (cGA) have been designed and implemented on a cluster of workstations. The peculiarities of the cGA permits to save memory in order to address large multi-FPGA partitioning problems, while the exploitation of parallelism allows to reduce execution times. The good results achieved on several experiments conducted on different multi-FPGA partitioning instances show that this solution is viable to solve multi-FPGA partitioning problems.

[1]  Gaetano Borriello,et al.  An evaluation of bipartitioning techniques , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Gaetano Borriello,et al.  An evaluation of bipartitioning techniques , 1995, Proceedings Sixteenth Conference on Advanced Research in VLSI.

[3]  John H. Holland,et al.  Adaptation in Natural and Artificial Systems: An Introductory Analysis with Applications to Biology, Control, and Artificial Intelligence , 1992 .

[4]  Frank Harary,et al.  Graph Theory , 2016 .

[5]  R. M. Mattheyses,et al.  A Linear-Time Heuristic for Improving Network Partitions , 1982, 19th Design Automation Conference.

[6]  David E. Goldberg,et al.  The compact genetic algorithm , 1998, 1998 IEEE International Conference on Evolutionary Computation Proceedings. IEEE World Congress on Computational Intelligence (Cat. No.98TH8360).

[7]  Scott Hauck,et al.  Multi-FPGA systems , 1996 .

[8]  S.,et al.  An Efficient Heuristic Procedure for Partitioning Graphs , 2022 .

[9]  Marco Tomassini,et al.  a Survey of Genetic Algorithms , 1995 .

[10]  Andrew B. Kahng,et al.  Recent directions in netlist partitioning: a survey , 1995, Integr..

[11]  Martin Hulin,et al.  Circuit Partitioning with Genetic Algorithms Using a Coding Scheme to Preserve the Structure of a Circuit , 1990, PPSN.

[12]  Andrew B. Kahng,et al.  A hybrid multilevel/genetic approach for circuit partitioning , 1996, Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems.

[13]  Laura A. Sanchis,et al.  Multiple-Way Network Partitioning , 1989, IEEE Trans. Computers.

[14]  Dirk Thierens,et al.  Mixing in Genetic Algorithms , 1993, ICGA.

[15]  José Ignacio Hidalgo,et al.  Partitioning and placement for multi-FPGA systems using genetic algorithms , 2000, Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future.

[16]  Scott Hauck,et al.  The roles of FPGAs in reprogrammable systems , 1998, Proc. IEEE.