Detecting support-reducing bound sets using two-cofactor symmetries

Detecting support-reducing bound sets is an important step in Boolean decomposition. It affects both the quality and the runtime of several applications in technology mapping and re-synthesis. This paper presents an efficient heuristic method for detecting support-reducing bound sets using two-cofactor symmetries. Experiments on the MCNC and ITC benchmarks show an average 40/spl times/ speedup over the published exhaustive method for bound set construction.

[1]  Alan Mishchenko,et al.  Generalized Symmetries in Boolean Functions: Fast Computation and Application to Boolean Matching , 2005 .

[2]  Alan Mishchenko.  Fast computation of symmetries in Boolean functions , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Wei Wang,et al.  Disjunctive decomposition of switching functions using symmetry information , 2000, Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat. No.PR00843).

[4]  Bo-Gwan Kim,et al.  Multilevel logic synthesis of symmetric switching functions , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Tsutomu Sasao,et al.  FPGA Design by Generalized Functional Decomposition , 1993 .

[6]  Sze-Tsen Hu.  ON THE DECOMPOSITION OF SWITCHING FUNCTIONS , 1961 .

[7]  Alan Mishchenko,et al.  A new-enhanced constructive decomposition and mapping algorithm , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[8]  Massoud Pedram,et al.  Boolean matching using binary decision diagrams with applications to logic synthesis and verification , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[9]  Karem A. Sakallah,et al.  Resynthesis of multi-level circuits under tight constraints using symbolic optimization , 2002, ICCAD 2002.

[10]  Karem A. Sakallah,et al.  Constructive multi-level synthesis by way of functional properties , 2001 .

[11]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[12]  Rolf Drechsler,et al.  BDD minimization using symmetries , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[13]  S. L. Hurst,et al.  A Digital Synthesis Procedure Under Function Symmetries and Mapping Methods , 1978, IEEE Transactions on Computers.

[14]  Sarma B. K. Vrudhula,et al.  BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis , 1993, 30th ACM/IEEE Design Automation Conference.

[15]  Victor N. Kravets,et al.  Constructive library-aware synthesis using symmetries , 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

[16]  Valeria Bertacco,et al.  The disjunctive decomposition of logic functions , 1997, ICCAD 1997.

[17]  H. A. Curtis,et al.  A new approach to The design of switching circuits , 1962 .