Time-domain performance bound analysis of analog circuits considering process variations

In this paper, we propose a new time-domain performance bound analysis method for analog circuits considering process variations. The proposed method, called TIDBA, consists of several steps to compute the bound performances in time domain. First the performance bound in frequency domain is computed for a linearized analog circuits by an variational symbolic analysis method and the Kharitonov's functions. Then the time domain performance bound is computed via a new general-signal transient bound analysis method. The new algorithm can give transient lower bound and upper bound of the performance variations affected analog circuits accurately and reliably. Experimental results from two industry benchmark circuits show that TIDBA gives the correct bounds for the Monte Carlo analysis while it delivers one order of magnitude speedup over the Monte Carlo method.

[1]  Sheldon X.-D. Tan,et al.  Hierarchical approach to exact symbolic analysis of large analog circuits , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  J. Mixter Fast , 2012 .

[3]  Kishore Singhal,et al.  Computer Methods for Circuit Analysis and Design , 1983 .

[4]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[5]  C.-J. Richard Shi,et al.  Simulation and sensitivity of linear analog circuits under parameter variations by Robust interval analysis , 1999, TODE.

[6]  A. Sedra Microelectronic circuits , 1982 .

[7]  Sheldon X.-D. Tan,et al.  Efficient approximation of symbolic expressions for analog behavioral modeling and analysis , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[8]  Sheldon X.-D. Tan,et al.  Efficient DDD-Based Interpretable Symbolic Characterization of Large Analog Circuits , 2003 .

[9]  Valeri Mladenov,et al.  Interval mathematics algorithms for tolerance analysis , 1988 .

[10]  Ezra Zeheb,et al.  Frequency response envelopes of a family of uncertain continuous-time systems , 1995 .

[11]  Robert Spence,et al.  Tolerance Design of Electronic Circuits , 1997 .

[12]  ASYMPTOTIC STABILITY OF AN EQUILIBRIUM P . OSITION OF A FAMILY OF SYSTEMS OF LINEAR DIFFERENTIAL EQUATIONS , 2022 .

[13]  Xuan Zeng,et al.  Worst case analysis of linear analog circuit performance based on Kharitonov's rectangle , 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

[14]  Rob A. Rutenbar Next-Generation Design and EDA Challenges: Small Physics, Big Systems, and Tall Tool-Chains , 2007, 2007 Asia and South Pacific Design Automation Conference.

[15]  Marcel J. M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[16]  Atsushi Kurokawa,et al.  Challenge: variability characterization and modeling for 65- to 90-nm processes , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[17]  B. P. Lathi,et al.  Modern Digital and Analog Communication Systems , 1983 .

[18]  S. Dasgupta Kharitonov's theorem revisited , 1988 .

[19]  Xieting Ling,et al.  Novel methods for circuit worst-case tolerance analysis , 1996 .

[20]  Rob A. Rutenbar,et al.  Canonical Symbolic Analysis of Large Analog Circuits with Determinant Decision Diagrams , 2002 .

[21]  Brian Wigdorowitz,et al.  Improved method of determining time-domain transient performance bounds from frequency response uncertainty regions , 1997 .

[22]  De Figueiredo,et al.  Self-validated numerical methods and applications , 1997 .

[23]  Jaeha Kim,et al.  Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[24]  A. W. M. van den Enden,et al.  Discrete Time Signal Processing , 1989 .

[25]  A.M. Davis,et al.  Microelectronic circuits , 1983, Proceedings of the IEEE.

[26]  Sheldon X.-D. Tan,et al.  Compact representation and efficient generation of s-expandedsymbolic network functions for computer-aided analog circuit design , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..