On-chip slew-rate control for low-voltage differential signalling (LVDS) driver

A low-voltage differential signaling (LVDS) driver with 3-bit programmable slew-rate control has been designed and fabricated in 0.13um complementary metal oxide semiconductor (CMOS) process. On-chip programmable capacitors allow cost saving compared to external capacitors and fine tuning to driver output slew-rate. This enables system designers with the flexibility to optimize driver slew-rate for wider range of applications. Slew-rate adjustment procedures are simple and yield accurate measurement results which meet the TIA/EIA-644-A standard.

[1]  Giovanni Campardo,et al.  A Reduced Output Ringing CMOS Buffer , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[2]  Xuecheng Zou,et al.  Design of output buffer with low switching noise and load adaptability , 2010 .

[3]  Hongjiang Song.  Dual mode transmitter with adaptively controlled slew rate and impedance supporting wide range data rates , 2001, Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No.01TH8558).

[4]  Karthik Rajagopal,et al.  Novel low delay slew rate control I/Os , 2009, 2009 1st Asia Symposium on Quality Electronic Design.