Future Directions of (Programmable and Reconfigurable) Embedded Processors

The advent of microprocessors in embedded systems has significantly contributed to the wide-spread utilization of embedded systems in our daily lives. Microprocessors can be found in devices ranging from simple controllers in power plants to sophisticated multimedia set-top boxes in our homes. This is due to the fact that microprocessors, called embedded processors in this setting, are able to perform huge amounts of data processing required by embedded systems. In addition and equally important, embedded processors are able to achieve this at affordable prices. In the last decade, we have been witnessing several changes in the embedded pro

[1]  Reiner W. Hartenstein,et al.  A New FPGA Architecture for Word-Oriented Datapaths , 1994, FPL.

[2]  Rahul Razdan,et al.  PRISC: programmable reduced instruction set computers , 1994 .

[3]  Peter Mark Athanas.  An adaptive machine architecture and compiler for dynamic processor reconfigurations , 1992 .

[4]  Stamatis Vassiliadis,et al.  The MOLEN rho-mu-Coded Processor , 2001, FPL.

[5]  Herman Schmit.  Incremental reconfiguration for pipelined applications , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

[6]  Gerry Kane,et al.  MIPS RISC Architecture , 1987 .

[7]  Paul Chow,et al.  Memory interfacing and instruction specification for reconfigurable processors , 1999, FPGA '99.

[8]  Frederick P. Brooks,et al.  Computer architecture - concepts and evolution , 1997 .

[9]  Seth Copen Goldstein,et al.  Managing pipeline-reconfigurable FPGAs , 1998, FPGA '98.

[10]  E. A. Lee,et al.  Effective Heterogenous Design and Co-Simulation , 1996 .

[11]  Scott Hauck,et al.  Configuration prefetch for single context reconfigurable coprocessors , 1998, FPGA '98.

[12]  John Wawrzynek,et al.  Garp: a MIPS processor with a reconfigurable coprocessor , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

[13]  Stamatis Vassiliadis,et al.  The MOLEN ρμ-coded processor , 2001 .

[14]  Seth Copen Goldstein,et al.  PipeRench: a co/processor for streaming multimedia acceleration , 1999, ISCA.

[15]  Maurice V. Wilkes,et al.  The best way to design an automatic calculating machine , 1981 .

[16]  J.S.S.M. Wong,et al.  Microcoded Reconfigurable Embedded Processors , 2002 .

[17]  Harvey F. Silverman,et al.  Processor reconfiguration through instruction-set metamorphosis , 1993, Computer.

[18]  Gert Slavenburg,et al.  An architectural overview of the programmable multimedia processor, TM-1 , 1996, COMPCON '96. Technologies for the Information Superhighway Digest of Papers.

[19]  David Seal,et al.  ARM Architecture Reference Manual , 2001 .

[20]  Leonid Ryzhyk,et al.  The ARM Architecture , 2006 .

[21]  Kunle Olukotun,et al.  A quantitative analysis of reconfigurable coprocessors for multimedia applications , 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

[22]  John L. Hennessy,et al.  The Future of Systems Research , 1999, Computer.

[23]  Ralph Wittig,et al.  OneChip: an FPGA processor with reconfigurable logic , 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.