Parallel Sorting on the B-HIVE Machine

1. C. Cordeiro and D. P. Agrawal, “Employing Dynamic Segmentation for Effective C-located Coexistence between Bluetooth and IEEE 802.11 WLANs,” IEEE GlobeCom, Nov. 17-21, 2002. 2. Nitin Auluck and Dharma P. Agrawal, “Reliability Driven, Non-Preemptive Real Time Scheduling of Periodic Tasks on Heterogeneous Systems,” IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS 2002), Nov. 4-6, 2002. 3. D. R. Radhakrishnan, D. Lal, J. Caffery, and D. P. Agrawal, “Performance Comparison of Smart Antenna Techniques for Spatial Multiplexing in Wireless Ad Hoc Networks,” 5th IEEE International Symposium on Wireless Personal Multimedia Communications, Oct. 27-30, 2002. 4. D. Lal, R. Toshniwal, R. Radhakrishnan, D. P. Agrawal, and J. Caffery, “A Novel MAC Layer Protocol for Space Division Multiple Access in Wireless Ad Hoc Networks,” International Conference on Computer Communication and Networks, Oct. 14 16, 2002. 5. C. Cordeiro, S. Das, and D. P. Agrawal, “COPAS: Dynamic Contention-Balancing to Enhance the Performance of TCP over Multi-hop Wireless Networks,” International Conference on Computer Communication and Networks, Oct. 14 16, 2002. 6. Sonali Bhargava and Dharma P. Agrawal, “Generic and Scalable security schemes for Ad Hoc Networks,” MILCOM, Oct. 7-10, 2002. 7. Sarjoun Doumit and Dharma P. Agrawal, “Self-Organizing & Energy-Efficient Networks Of Sensors,” MILCOM, Oct. 7-10, 2002. 8. Hang Chen, Q-A. Zeng, and Dharma P. Agrawal, “A Novel Analytical Modeling for Optimal Channel Partitioning in the Next Generation Integrated Wireless and Mobile Networks,” won Best Paper Award, ACM MSWiM Workshop, Sept. 28, 2002. 9. Carlos Cordeiro and Dharma P. Agrawal, “Mitigating the Effects of Intermittent Interference on Bluetooth Ad Hoc Networks,” 13th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC), Sept. 15-18, 2002. 10. D. Lal, R. Gupta, and D. P. Agrawal, “Throughput Enhancement in Wireless Ad Hoc Networks with Spatial ChannelsA MAC Layer Perspective,” Seventh IEEE Symposium on Computers and Communications (ISCC), July 1 4, 2002. 11. Carlos Cordeiro and Dharma P. Agrawal, “Enhancing Performance of the Bluetooth Wireless Channel Through Dynamic Segmentation,” 20th Brazilian Symposium on Computer Networks (SBRC), May 20-24, 2002 12. Hrishikesh Gossain, Siddesh Kamat, and Dharma P Agrawal, “A framework for handling multicast source movement in mobile-IP,” IEEE ICC, April 28-May 2, 2002. 13. A. Manjeshwar and D. P. Agrawal, “APTEEN: A Hybrid Protocol for Efficient Routing and Comprehensive Information Retrieval in Wireless Sensor Networks,” 2nd International Workshop on Parallel and Distributed Computing Issues in Wireless Networks and Mobile Computing, April 15-19, 2002. 14. Sachin Abhyankar and Dharma P Agrawal, “Distributed Mobility-Aware Route Selection for Wireless Ad Hoc Networks,” 21st IEEE International Performance, Computing, and Communications Conference (IPCCC) April 3-5, 2002.

[1]  Dharma P. Agrawal,et al.  Modeling of parallel software for efficient computation communication overlap , 1987, FJCC.

[2]  J. Browne,et al.  Analysis and Design of Parallel Algorithms and Implementations for Some Image Processing Operations , 1987, ICPP.

[3]  Dharma P. Agrawal,et al.  Dynamic Accessibility Testing and Path Length Optimization of Multistage Interconnection Networks , 1985, IEEE Transactions on Computers.

[4]  Dharma P. Agrawal,et al.  MASCO: An academic exercise in computer design using microprogramming , 1984, MICRO 17.

[5]  Dharma P. Agrawal,et al.  CMOS fault testing: multiple faults in combinational circuits single fault in sequential circuits , 1984 .

[6]  Dharma P. Agrawal,et al.  B - HIVE: a heterogeneous, interconnected, versatile and expandable multicomputer system , 1984, CARN.

[7]  Dharma P. Agrawal,et al.  On design and performance of VLSI based parallel multiplier , 1983, 1983 IEEE 6th Symposium on Computer Arithmetic (ARITH).

[8]  Dharma P. Agrawal,et al.  A general class of processor interconnection strategies , 1982, ISCA '82.

[9]  Dharma P. Agrawal,et al.  A pipelined pseudoparallel system architecture for motion analysis , 1981, ISCA '81.

[10]  Dharma P. Agrawal,et al.  Teaching Microcomputer Programming with Application-Oriented Problems , 1981, IEEE Transactions on Education.

[11]  V. K. Agarwal,et al.  On-line Fault Detection And Correction In Microprocessor Systems , 1979 .

[12]  Dharma P. Agrawal,et al.  A microprocessor-controlled asynchronous circuit switching network , 1979, ISCA '79.

[13]  Dharma P. Agrawal,et al.  A survey of communication processor systems , 1978, COMPSAC.

[14]  Dharma P. Agrawal,et al.  On modulo (2n+1) arithmetic logic , 1978, 1978 IEEE 4th Symposium onomputer Arithmetic (ARITH).

[15]  Dharma P. Agrawal,et al.  On arithmetic inter-relationships and hardware interchangeabiltty of negabinary and binary systems , 1978, 1978 IEEE 4th Symposium onomputer Arithmetic (ARITH).

[16]  Dharma P. Agrawal,et al.  Optimum array-like structures for high-speed arithmetic , 1975, 1975 IEEE 3rd Symposium on Computer Arithmetic (ARITH).

[17]  H. Singh,et al.  A Generalized Pipeline Array , 1974, IEEE Transactions on Computers.

[18]  M. Lal,et al.  On Parameter Space Method for Control System Analysis and Design , 1970 .

[19]  Dharma P. Agrawal,et al.  Applications of SIMD computers in signal processing , 1899, AFIPS '82.

[20]  Dharma P. Agrawal,et al.  Design of software for distributed/multiprocessor systems , 1899, AFIPS '82.

[21]  Dharma P. Agrawal,et al.  Randomized Parallel Algorithms for Prolog Programs and Backtracking Applications , 1987, International Conference on Parallel Processing.

[22]  James C. Browne,et al.  REPRESENTATION BASIS FOR THE EXPRESSION OF COMMUNICATION TIMES OF ALGORITHMS EXPRESSED IN TERMS OF COMPUTATION GRAPHS. , 1987 .

[23]  Dharma P. Agrawal,et al.  Impact of Cluster Network Failure on the Performance of Cluster-Based Supersystems , 1986, ICPP.

[24]  Dharma P. Agrawal,et al.  Multi-Micro Processor System: Another Viewpoint (Response) , 1986, IFIP Congress.

[25]  Dharma P. Agrawal,et al.  Task Division and Multicomputer Systems , 1985, ICDCS.

[26]  D. P. Agrawal,et al.  Easily testable interconnection network from three-state cells (parallel processing) , 1983 .

[27]  D. P. Agarwal,et al.  Fault tolerant capabilities of redundant multistage interconnection networks (multiprocessors) , 1983 .

[28]  Dharma P. Agrawal,et al.  A Multiprocessor System for Dynamic Scene Analysis , 1982 .

[29]  Dharma P. Agrawal,et al.  Design and performance of a general class of interconnection networks , 1982, ICPP.

[30]  Dharma P. Agrawal,et al.  Graceful Fault tolerance in large networks of microcomputers , 1982, ICDCS.

[31]  Dharma P. Agrawal,et al.  VLSI Performance of Multistage Interconnection Network Using 4*4 Switches , 1982, ICDCS.